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Messages from 925

Article: 925
Subject: FPGA synthesis
From: msnook@armltd.co.uk (Mark Snook)
Date: 30 Mar 1995 16:05:01 GMT
Links: << >>  << T >>  << A >>
Would anyone like to comment on the relative merits of using Exemplar
against Compass FPGA synthesis tools. Compass suits our design flow,
but appears to be a more segmented approach than Exemplar.

Any experiences would be very useful.

Mark Snook


Article: 926
Subject: Re: Excuse me while I vent about Data I/O & Abel...
From: rxjf20@email.sps.mot.com (Doug Shade)
Date: 30 Mar 1995 16:26:34 GMT
Links: << >>  << T >>  << A >>
Yes sir-re-bob

I've been using various versions of ABEL for over a year now.  I got
the ABEL6 upgrade.... but after carefully reading (and re-reading) the
User Notes, cavaets, long long long bug list... I threw it all back in
the box and put it up on the shelf!  I'm still using ABEL 5 something
or other... its DOS based, its fairly fast, it works for me.

In their defense...
They support just about everything.

I've had decent responses from tech support (though sometimes not
quickly).

Documentation should be held up as a model (Ooops, I meant ABEL5
documentation... I just pulled out ABEL6 docs and they blew it here
too... ABEL5 was in a fat 3 ring binder that allowed updates/errata to
be inserted, very well written, with lots of examples.)

Their hardware (unisite) is robust and works well... though it's user
interface is showing its age, but what the heck it works.

All things considered DATA I/O reminds me of that old Lily Tomlin skit
where she is a telephone switchboard operator... "We don't care, we
don't have to, we're the phone company".  And like the phone company,
it could be better, but it works almost all the time.

Yes, I have complaints about the software, but my actions bear my
testimony that I believe it to be the most useful available.  But take
that with a grain of salt, I mean after all I use Windows on occasion
too!

Just my opinions. I do not speak for my employer.

Doug Shade
rxjf20@email.sps.mot.com


Article: 927
Subject: SIS synthesist generation
From: gdk5249@vaxb.isc.rit.edu
Date: Thu, 30 Mar 1995 17:45:46 GMT
Links: << >>  << T >>  << A >>
Does anyone know how to get a copy of a SIS synthesis package written
at UCB.
If you do, please let me know at gdk5249@rit.edu , I don't usually
read Newsgroups.
Thank you,
Guillermo krawiec
Rochester Institute of etchnology
Rochester Institute of technology
P.S.-I am looking for Automatic Test Pattern generation Software


Article: 928
Subject: Xilinx - NeoCad merger
From: tessier@HORNET.LCS.MIT.EDU (Russ Tessier)
Date: 30 Mar 1995 20:01:30 GMT
Links: << >>  << T >>  << A >>


Got this from a friend of mine:

For Immediate Release:

XILINX ANNOUNCES MERGER WITH NEOCAD

SAN JOSE, Calif., March 29, 1995 -- Xilinx, Inc. (NASDAQ:XLNX), the leader in
programmable logic, today announced the acquisition of NeoCAD, Inc., a
developer of high performance design software for FPGAs. The merger underscores
Xilinx's continued commitment to provide a diverse suite of programmable logic
solutions. Combining Xilinx's strength in FPGA and EPLD programmable logic
devices and process technologies with NeoCAD's advanced FPGA software
technology, the merger will provide Xilinx's large customer base with immediate
access to even more powerful FPGA software design solutions. Additionally, the
combination of technologies will allow Xilinx to accelerate development of an
even broader range of FPGA products to satisfy expanding market needs.

The companies have signed a definitive agreement for the acquisition. Terms are
not being disclosed at this time.

Commenting on the announcement, Curt Wozniak, president and chief operating
officer of Xilinx, stated, "Customers have demanded a wide range of
architectures and programming technologies to satisfy their product needs, and
software is a key enabler in this regard. It is clear that NeoCAD, with its
advanced FPGA software, can provide innovative technology that will allow
Xilinx to accelerate its software and hardware development, in order to keep
pace with the demanding marketplace. This increased capability will allow
Xilinx to significantly enhance its industry leading FPGA and EPLD solutions
and bring new solutions to market more quickly, further increasing our
customers' programmable logic alternatives."

According to Kenn Perry, vice president of NeoCAD, "Having served the
programmable logic industry with high performance software technology over the
past four years, it became apparent to us that Xilinx offers the dominant
solution for programmable logic designers. Indeed, because our software
technology works so well with Xilinx's devices, this merger becomes a win-win
situation for our customers and allows us to serve a broader base of
applications with continued innovations in both hardware and software."

Xilinx's current software development system, XACT, will ultimately employ
NeoCAD's software technology to provide a flexible, technology-independent
methodology that enables Xilinx to quickly support its current and emerging
architectures. Equally important, the NeoCAD FPGA technology evaluation
capability, whereby customers can perform "what if" scenarios and select the
optimum device based on their cost, speed and density requirements, will also
be incorporated with Xilinx's software system. The XACT development system has
been shipped to more than 21,000 customers worldwide and supports the XC2000,
XC3000, XC4000, XC5000 and XC7000 device families from Xilinx.

The MOS programmable logic market is expected to grow frum $1.3 billion in 1994
to $2.4 billion in 1998, according to San Jose, Calif.-based market research
firm Dataquest. The continued growth of the high-density, high-performance
programmable logic market is largely dependent upon the capabilities of the
development software. While programmable logic devices need to be faster,
denser and less expensive, the design software needs to be easier to use,
provide more powerful design and debug capabilities and be supplied to
customers in advance of device availability. With an accelerated approach, such
as that provided by NeoCAD, Xilinx will be able to offer its customers complete
logic solutions more quickly.

NeoCAD was founded in November 1990 to addresss the need for high-performance
design tools for programmable technologies. NeoCAD is the only company providing
device-independent implementation tools to support the growing number of unique
FPGA architectures. NeoCAD is headquartered at 2585 Central Avenue, Boulder,
Colorado, 80301.

Founded 11 years ago, Xilinx is the world's leading supplier of the billion
dollar CMOS programmable logic industry. The company pioneered the market for
field programmable gate arrays (FPGAs), semiconductor devices that provide high
integration and quick time to market for electronic equipment manufacturers in
a wide variety of industries. The company continues to aggressively innovate in
device architecture, process technology and implementation software.

#004#Questions & Answers

Q.	Why did Xilinx acquire NeoCAD?
A.	The merger underscores Xilinx' continued commitment to provide a diverse
suite of programmable logic solutions.  Combining Xilinx' strength in EPLD and
FPGA programmable logic devices, process and software technologies with
NeoCAD's advanced FPGA software technology, the merger will provide Xilinx'
installed base of users with immediate access to more powerful FPGA software
design solutions. Additionally, the combination of technologies will allow
Xilinx to accelerate the development of a broader range of FPGA products to
satisfy expanding market needs. 

Q.	What are the financial aspects of the acquisition?
A.	At this time, we cannot comment on the financial aspects of the acquisition.

Q.	Is NeoCAD a privately owned company? Who are its investors?
A.	NeoCAD is a private company, funded by private investments and employees. 

Q.	When will the acquisition be completed and what are the potential problems
that may impede or sink the completion of this acquisition?
A.	The acquisition will be completed within 3 weeks and we don't expect any
problems.

Q.	To whom will the NeoCAD people report and why?
A.	Dave Bennett, NeoCAD Vice President of Engineering will report to Bill
Carter, Xilinx Vice President of R&D.  Kenn Perry, NeoCAD Vice President of
Marketing will report to Chuck Fox, Xilinx Vice President of Marketing

Q.	What happens to the XACT software as a result of this acquisition?
A.	Xilinx will continue to ship XACT releases, the next one being XACT 6.0,
scheduled in Q395. Future Xilinx XACT releases will employ the NeoCAD FPGA
software technology.

Q.	How will this affect the current schedule of NeoCAD Foundry V7.0?
A.	Not at all.  FPGA Foundry release 7.0 will ship as planned.

Q.	How are NeoCAD products currently sold?  
A.	NeoCAD products are sold through direct sales channels, VARs and through an
OEM agreement with a major EDA vendor (Mentor Graphics.)

Q.	Did NeoCAD have any patents that Xilinx needed to access?
A.	No, Xilinx did not need any patents, but significant intellectual property
is embodied in their technology,  which will be of benefit going forward.

Q.	How will this acquisition affect Xilinx' agreements with other  EDA tool
vendors such as Synopsys, etc.
A.	Xilinx expects the acquisition will have no immediate effect.
 
Q.	How many people does NeoCAD employ?
A.	NeoCAD employs about 50 people.  All NeoCAD employees will become Xilinx
employees with the merger.

Q.	Why is NeoCAD selling?
A.	Since being founded in November 1991, NeoCAD has earned recognition as the
leader in FPGA software technology.  NeoCAD has been very successful in
developing technologies enabling the delivery of powerful programmable product
solutions through innovative software technologies and development processes. 
To date, this has been through strong relationships with new market entrants.

	NeoCAD was presented with rare opportunity to join an existing market leader
and play a major role in increasing their market dominance.  NeoCAD's strengths
address issues that have been obstacles for Xilinx and both companies will be
more successful together than they would have been individually.

Q.	What happens to customers who currently have NeoCAD software for AT&T,
Motorola or Actel silicon?
A.	It is Xilinx's intention to support these customers as defined in the
existing software agreements with the respective vendors.  This information is
protected under non-disclosure and can not be shared publicly.  Further
discussions with NeoCAD partners is required to determine the exact nature of
ongoing support.

Q.	Will current NeoCAD customers designing Xilinx devices continue to get
updates for Xilinx XC3000, XC3100 and XC4000 chips?
A.	Yes.   Xilinx will continue to support all existing NeoCAD / Xilinx
customers under sofware maintenance agreement.  A migration path to the Xilinx
XACT software solution will be established.  The NeoCAD technology will
aggressively be employed in future XACT releases.

Q. 	Will current Xilinx customers get and update to the NeoCAD software for
Xilinx?

A.	A migration path for Xilinx customers to get access to the NeoCAD software
will be defined in the near future. 

Q.	Who will customers call for NeoCAD technical support?
A.	NeoCAD software will be supported out the existing  Boulder R&D center now
named Xilinx Boulder.  Support for other vendors will be provided as
contractually designated.  Xilinx support will be ongoing.

Q.	How do customers place an order for NeoCAD tools?
A.	NeoCAD channels will continue to sell the NeoCAD software supporting Xilinx.
 Orders for NeoCAD software supporting Xilinx can be taken immediately through
all NeoCAD sales channels. The NeoCAD VARs will continue to sell NeoCAD
software supporting Xilinx until further notice. 

Q.	Will Xilinx now sell NeoCAD FPGA Foundry software?
A.	No.  NeoCAD channels will continue to sell the NeoCAD software supporting
Xilinx.  Orders for NeoCAD software (supporting Xilinx) can be taken
immediately through all NeoCAD sales channels. The NeoCAD VARs will continue to
sell NeoCAD software supporting Xilinx until further notice. 
 
Q.	Will the NeoCAD group become a separate division of Xilinx or will it be
absorbed?
A.	The NeoCAD group will remain in Boulder as the nucleus of the Xilinx Boulder
R&D site.  The NeoCAD team located in Boulder,  in conjunction with the Xilinx
R&D teams worldwide will jointly develop software.  We will leverage the NeoCAD
team's expertise and experience and expect them to take a significant
leadership role in driving our overall software direction.

###






------- End of Forwarded Message




Article: 929
Subject: High-speed counters (was: AT&T FPGA #6 - Application Notes)
From: lemieux@eecg.toronto.edu (Guy Gerard Lemieux)
Date: 30 Mar 95 21:33:44 GMT
Links: << >>  << T >>  << A >>
In article <250@bloggs.win-uk.net>,
Ian Packer <ipacker@bloggs.win-uk.net> wrote:
>1) Designing High Speed >100MHz Counters                AP94-001FPGA
>   using Linear Feedback Shift Registers


for those who are interested, here are a couple of other references
that are useful:

	Prescaled Counters in FLEX 8000 Devices, Altera Application Brief 124

	Constant Time Arbitrary Length Synchronous Binary Counters,
	J.E.Vuillemin, 1991 IEEE 10th Symp. on Computer Arithmetic

	Maximal and Near-Maximal Shift Register Sequences:  Efficient
	Counters and Easy Discrete Logarithms, D. W. Clark and L-J. Weng,
	IEEE Transactions on Computers, Vol 43 No 5, May 1994.

guy lemieux


Article: 930
Subject: Re: Excuse me while I vent about Data I/O & Abel...
From: bowns@Data-IO.COM (Tom Bowns)
Date: Thu, 30 Mar 1995 23:18:41 GMT
Links: << >>  << T >>  << A >>
	J. Kubicky writes....."I couldn't find anything besides 
ABEL in the $3k price range that would allow me to do equation/state
machine entry and target Lattice isp ....... I've only been using the
software for afew days, so maybe I just haven't figured everything out
yet, but I think I have been badly ripped off...."

We try to make our software easy to learn - especially for the first time
user, not an easy task.  However, ABEL is the defacto standard HDL for 
PLD design due to the large device support, the OPEN intermediate file 
format and the general power of the language.  I am sorry your experience
has been a difficult one.  I will have our technical support people call
immediately.  If you still feel you are not satisfied with the product,
please call me and I will see that you get a full refund.

Dave Kohlmeier
Director of Marketing
Design Software Products
Data I/O
davek@data-io.com
206-867-6802




Article: 931
Subject: Re: FAQ/getting started/cheap?
From: jma@descartes.super.org (Jeffrey M. Arnold)
Date: Thu, 30 Mar 1995 23:30:44 GMT
Links: << >>  << T >>  << A >>
In article <kjSf8rq00WA1Q6y30q@andrew.cmu.edu> Aaron Wohl <aw0g+@andrew.cmu.edu> writes:
   I am interested in building an emulator for a microchip PIC16Cxx with a
   FPGA as a hobby project.   I work at Carnegie Mellon University. 
   Perhaps there is a staff/departmental starter deal?   Is there an FAQ
   and/or archive for this list?

There is not (as yet) a FAQ list (any volunteers?), but there is an
archive of the list on:

	http://www.super.org:8000/FPGA/comp.arch.fpga

You'll find other useful links there as well.

Also, several vendors have special deals on their development systems 
for universities.  You should check with Xilinx and Altera for more
info.

-jeff

------
Jeffrey Arnold
IDA Supercomputing Research Center
17100 Science Dr.
Bowie, MD 20715
email: jma@super.org



Article: 932
Subject: Re: Opinions on IBM PowerPC for Electronics CAD lab
From: ep520mi@pts.mot.com (MARK INDOVINA Xxxxx Ppppp)
Date: Fri, 31 Mar 1995 02:14:44 GMT
Links: << >>  << T >>  << A >>
In article <BENEDETT.95Mar28154239@caliban.dsi.unimo.it>,
Arrigo Benedetti <benedett@caliban.dsi.unimo.it> wrote:
>We are setting up a brand new laboratory for hardware development
>(mainly FPGA based designs, maybe VLSI designs in the future) and
>are selecting a workstation for running CAD software (Viewlogic and
>Xilinx tools at present).
>In this phase we are considering the IBM PowerPC worstations running
>AIX. These machine will be networked with a bunch of Suns, and we'd
>like to have all the machines in a NIS domain.
>
>I'd like to hear impressions from people using these machines in a
>similar design environment, as well as any advice on possible
>problems that we could have with these boxes.
>
[...hardware stuff snipped...]

Does Viewlogic and Xilinx support AIX? I would assume you could easily
get the tools compiled for widowz & dos running on a PowerPC box,
but an AIX port??? Press the vendors carfully on this question...

Regards,
Mark
-- 
/* Mark A. Indovina, Principal Staff Engineer   mark_indovina@pts.mot.com */
/* MOTOROLA   Strategic Semiconductor Operation, IC Technology Laboratory */
/* Mail Stop 63, 1500 Gateway Boulevard, Boynton Beach, FL 33436-8292 USA */
/* phone: 1-407-739-2379, fax: 1-407-739-3904    ...just speaking for me! */


Article: 933
Subject: Re: Memory in xc4000 using synopsys...
From: gel101@gel.ulaval.ca (Vincent Rowley)
Date: 31 Mar 1995 04:40:54 GMT
Links: << >>  << T >>  << A >>
In article <jshah.796430490@popeye.cs.iastate.edu>, jshah@cs.iastate.edu (Jatan Shah) writes:
>
>Hi,
>
>	I have been trying to synthesize memory elements in the Xilinx  
>4000 series CLBs, without much success.  I do know that it is possible
>to configure each of the XC4000 CLBs either as a 32x1 RAM or  a 16x2
>RAM, however I could not get synopsys to generate the required
>circuit.  Can anyone who has had some experience in this particular
>subject help me?.  
>

Hi,

If you want to use memory in XC4000 FPGAs, you should instantiate
16 x 1 or 32 x 1 XILINX RAM primitives in your sources. You can
also implement any other RAM size using XACT MemGen program. See
the Xilinx Synopsys Interface User Guide for more informations.

Vincent Rowley

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Vincent Rowley                      Laboratoire de Vision et
                                    Systemes Numeriques
                                    Universite Laval
                                    Cite Universitaire
                                    Quebec, Canada
e-mail: gel101@gel.ulaval.ca        G1K 7P4
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~




Article: 934
Subject: Re: meta-systems, who are they ?
From: shand@src.dec.com (Mark Shand)
Date: 31 Mar 1995 08:13:10 GMT
Links: << >>  << T >>  << A >>

In article <3lcqoa$r48@ixnews3.ix.netcom.com>, sjsmith@ix.netcom.com (stephen smith) writes:
> who apparently have ASIC emulation technology based on a 
> proprietary fpga ?

Your information is correct.  I talked to them last June when their product
was just becoming available.  Since then I hear they have made a number
of wins in Europe.  They were/are(?) much cheaper per gate then Quickturn.

The phone number I have for them is +33 (1) 34.65.00.13 at that time
they were located in Jouy-en-Josas, in the suburbs southwest of
Paris.  They have moved to bigger offices since then but the number
may be valid.

I was very impressed with what I saw last June.

Mark Shand.



Article: 935
Subject: Re: Excuse me while I vent about Data I/O & Abel...
From: pngai@mv.us.adobe.com (Phil Ngai)
Date: Fri, 31 Mar 1995 08:46:39 GMT
Links: << >>  << T >>  << A >>
In article <3lbdtr$o1j@gap.cco.caltech.edu> jkubicky@cco.caltech.edu (Joseph J. Kubicky) writes:
>I (or, rather, my company) just paid nearly $3K for Abel 6.0 for
>Windows and a fitter for Lattice PLDs.  Now the Lattice devices

As a person who has been using Abel for several years and Synario for
almost a year, I wanted to respond to your comments. I certainly don't
feel the way you do about the product. I think ripped off is much too
strong a term, and probably not even true. I find it especially ironic
that you compare Abel's value with the Intel package.

Do you realize that Intel is a chip company? Of course they are going
to give away their software. They want to sell chips.

In fact, they are no longer in the programmable logic business. Seems
they found it to be unprofitable.

I don't think doing value comparisons with a company that went out
of business makes any sense! Perhaps you'd like to calculate how much
it costs to get tech support from Intel for PLDShell...

>My first problem has been with the hardware lock.  It works ok on
>my laptop (which is a relatively slow 486SX/33 with 8MB RAM) but
>isn't recognized on my desktop (a 486/100 clone w/ 24MB RAM).  My

I've never had any problems with their hardware locks so your
experience is probably not typical.

>It would be REALLY nice to be able to do things on my fast machine,
>since the software is Win32s and is SLOW.

Slow is not the term I would use, but I have a P-90.

>Simulation is the 'base' $3000 version is limitted to what they
>call Equation and JEDEC simulation.  Basically you give it test
>vectors and it simulates the design to tell you if there's a match.
>As near as I can tell, though, there's no ability to do looping or
>any conditional stuff in the test vector section which would 

Sure there is. Read about macros. I've actually used them, but
these days I use verilog.

>would be great, but I think that is considered 'Functional Simulation'
>and is thus only available via the very expensive Verilog simulator

very expensive is relative. Try buying verilog from Cadence or
Chronologic.

>So Data I/O has this incredible attitude when you call them like
>they're selling this fantastic product and you should be happy to pay
>list price.

Do you go into Sears or Burger King and try to get "a deal" too?
I don't think this is at all a valid complaint.

>PS: These experiences may very well push me over to the Altera MAX8000
>camp.  I think their software may be much better for around the same
>price.  Lattice take note - get some decent entry-level tools.

What's a MAX8000? Perhaps you mean Flex8000? Anyway, you won't find
Altera giving away their software, unless you want to do VERY SMALL
designs.

As far as their chips, I only used a 5192 and boy was it painful
trying to make a change without having the pin assignments change.
Nice parts in theory, I don't know why the pinout was so sensitive.

And could you get me a price on a Lattice fitter for Max+Plus?

>PPS: I almost forgot.  They've also broken everything into pieces so it's
>like buying a car where you pay $20K base or $25K if you want it with
>tires.  The base package is $2K.  Then they charge you $300 for ONE YEAR of
>tech support.  I guess they just dump your voice mail if you didn't pay up.
>Then you pay $500-$1K for a typical fitter (I got my Lattice fitter for
>$600 on sale).  THEN you pay a few hundered MORE for some kind of funky
>thing that goes between Abel and the fitter.  I'm not exactly sure what this
>is, because I don't have it yet, and I think it only applies to the Windows
>version of Abel (that is, Abel 6.0), but I know it's an extra thing,
>separate from the fitter, that you have to pay for.  Data I/O really bites.

Well, I have to say I don't think this complaint is valid either. The fact
that Data I/O lets you buy only what you need doesn't bother me.
-- 
 Question Authority, but never shoot back.


Article: 936
Subject: Re: Excuse me while I vent about Data I/O & Abel...
From: trev@ss11.wg.icl.co.uk (Trevor Hall)
Date: Fri, 31 Mar 1995 09:24:04 GMT
Links: << >>  << T >>  << A >>
jkubicky@cco.caltech.edu (Joseph J. Kubicky) writes:-
>I (or, rather, my company) just paid nearly $3K for Abel 6.0 for
>Windows and a fitter for Lattice PLDs.  Now the Lattice devices
>look very nice - in-circuit programmable, good internal connectivety,
>and some other nice things.  I couldn't find anything besides Abel in the
>$3K price range that would allow me to do equation/state-machine
>entry and target Lattice isp (if anyone knows of anything that fits
>this description, please let me know ASAP - note that I'm not really
>interested in schematic entry).  

Have you looked at MINC's PLDesigner XL ?
MINC have recently introduced Lattice ISP support. I believe their route uses an
OpenABEL bridge into the Lattice fitter.
I have recently completed two ISP3256 designs using MINC as the front end with a
MINC2ABL bridge, co-developed by ourselves and Lattice (MINC's own product was
not available in our timeframes).
Although there are one or two bugs in our bridge, it has on the whole been very
successful. I was especially impressed with the Lattice devices and the ease of which
my designs (both up at the 80-90% pin and CLB usage) fitted.


PLDesigner offers equation, state m/c, if then else, case, function and procedure type
input along with schematic interfaces and optional VHDL.
The simulator has support for conditional branching and looping.

MINC can be contacted on apps@minc.com

And before anyone asks;- no I have nothing to do with MINC.

Cheers,
T.H. (trev@wg.icl.co.uk)










Article: 937
Subject: Re: Excuse me while I vent about Data I/O & Abel...
From: CERISOLA@pol88a.polito.it (Mauro Cerisola)
Date: 31 Mar 1995 09:31:52 GMT
Links: << >>  << T >>  << A >>
Joseph J. Kubicky (jkubicky@cco.caltech.edu) wrote:

> I (or, rather, my company) just paid nearly $3K for Abel 6.0 for

[... complaints omitted... ]

I've been working at Stanford University for a year and had the same
troubles with a Logical Devices ALLPRO88XR programmer and CUPL Totaldesigner
for MSDOS compiler.
Hardware/software bugs, VERY poor support, continuous need to insert/remove/
buy software adaptors, VERY expensive.

I think  big companies (data io, logical devices) just don't care of single
customers, or make better tools for unix workstations.
We'd save a lot of time/money if we had decided to use the cheap/free
packages like AMD PALASM4, Intel PLDShell, even learning their own language
every time, and bought a general purpose cheap programmer.

Hope this saves money&time to some people...

Mauro Cerisola, Politecnico di Torino, Italy.


Article: 938
Subject: Howto FPGA ????
From: b34vcb@ku.ac.th (Virachat Boondharigaputra (34052027))
Date: 31 Mar 1995 11:47:36 GMT
Links: << >>  << T >>  << A >>
	My project is build FIFO (First In First Out) from FPGA chip.
I know that it just a simple task for FPGA but I had very short time to 
work on my project.I use ViewLogic and XACT development tools for my project.
	I had finish VHDL programing,Simulation and get FIFO.BIT file now.
But I don't know exact way to load it in to FPGA.An manual of XACT 
confuse me a lot.I use X3000 chip of Xilinx.it is No. 3090p84.
	I'm very grad if anyone could explain me how to load it in to FPGA 
and howto use programed FPGA.I just know that I must load it in to EPROM 
first and let FPGA load data file from EPROM,but I don' sure about all of this.
	A simple summary is very helpful.
						Thank a lot

						Virachat


Article: 939
Subject: Re: meta-systems, who are they ?
From: Louis Audoire <Louis.Audoire@inria.fr>
Date: 31 Mar 1995 12:55:58 GMT
Links: << >>  << T >>  << A >>
>meta-systems, who are they ?

META SYSTEMS 
Bat Hermes
4, rue Rene Razel
91400 SACLAY
FRANCE
phone: +33 (1) 69.35.10.00   FAX: +33 (1) 69.35.10.10

e-mail: fr@meta-systems.fr   <Frederic Reblewski>


Article: 940
Subject: How do I connect an external crystal to a XC4000?
From: geirert@idt.unit.no (Geir Ertzaas)
Date: 31 Mar 1995 14:12:14 GMT
Links: << >>  << T >>  << A >>

How do I connect an external crystal to a 4000 series Xilinx.
-----------------------

Hi, I have a few simple questions. I need to connect a crystal (not an
oscilator) to a XC4000. 

The desired frequency is 8Mhz. How should I wire this internally. Can I
take it in through any general purpose i/o pin, feed it through an inverter,
and out through another gp i/o pin back to the crystal. Which side should I
feed to a clock buffer, the in or out side of the inverter, does it matter?
And finally what size resistors and capacitors should I use?


According to the databook the XC3000 has special support for external
crystals, but this is lacking in the XC4000 series. How come?




Article: 941
Subject: Re: Neocad merges with Xilinx
From: dgamble@wimsey.com (Don Gamble)
Date: Fri, 31 Mar 1995 08:00:36
Links: << >>  << T >>  << A >>
Steve writes:

>>It is now confirmed from reliable sources that Xilinx has taken
>>over Neocad this week to put an end to the competition for Xilinx
>>P&R tools.
>>
>>-ASM.

>Isn't NeoCAD supposed to be the sole source for the tools for both ATT
>and Motorola?  I wonder how those development efforts are going to go
>now ...

The Motorola family of FPGAs (MPA-1000 series) is also supported
by Capilano Computing.  They offer a full set of schematic libraries
and the place and route software.  You can reach Capilano at

email: capilano_computing@wimsey.com   or
phone: 604-522-6200

Don.


Article: 942
Subject: Re: Neocad merges with Xilinx
From: ipacker@bloggs.win-uk.net (Ian Packer)
Date: Fri, 31 Mar 1995 17:17:58 GMT
Links: << >>  << T >>  << A >>
Please, please tell me this is a wind up!



In article <3ldf7p$4cg@hustle.rahul.net>, ASM
(someone@somewhere.com) writes: >
>It is now confirmed from reliable sources that Xilinx has taken
>over Neocad this week to put an end to the competition for Xilinx
>P&R tools.
>
>-ASM.
>

Regards,
Ian Packer.
Bytech Electronics Ltd.


Article: 943
Subject: Neocad purchased by Xilinx
From: bobe@soul.tv.tek.com (Bob Elkind)
Date: 31 Mar 1995 17:27:58 GMT
Links: << >>  << T >>  << A >>
Yes, it's a shocker.  Neocad has been purchased by Xilinx.

If you've recently upgraded to XACT 5.x release, with the
shiny brand new "universal" libraries, and you are busily
translating your schematics to the new libraries, then
you may want to stop right now.

Personally, I like translating schematics.  I've been using
XACT with OrCad libraries for 4 years now, and I'm love
changing libraries.  I'm used to it.

For Xilinx, this is a very good move.  Really puts their
competitors in a potentially awkward situation (e.g. ATT/ORCA,
Actel, et al), having their main EECAD dudes working for the
"bully" of the FPGA world.

I've heard that ATT has broad rights (and possession) of the
Neocad source code.  I wonder what they'll do with it.

I'm surprised that ATT (in particular) let this happen.
Did the venture capitalists for Neocad forget to shop around
for the highest bidder?

Again, shred move by Xilinx.  I look forward to comments
and followups from Xilinx, ATT, Actel, Neocad, Motorola,
etc. etc.

Bob Elkind, Tektronix TV Products
bobe@tv.tv.tek.com


Article: 944
Subject: Data I/O & BP programmers (was Excuse me ...)
From: dwg@glenqcy.glenayre.com (David W. Glessner)
Date: 31 Mar 1995 17:38:10 GMT
Links: << >>  << T >>  << A >>
We need to get a new programmer to support some larger devices
(e.g. 84-lead PLCC Xilinx 7372) and are considering upgrading our Data
I/O 2900 to a 3900 or purchasing a new BP-1200 from BP Microsystems.

I've not been pleased with Data I/O's support, mainly because their
attitude seems to be that "you should be so thankful that you can be
so lucky to use our products."  Data I/O was very unhelpful last
summer when I needed to program a Flash that wasn't on their list.

The BP-1200 costs about $6000.  Because of discounts involved in
upgrading, the 3900 would cost us about $4000.

Do any of you have other insights that would help us make a decision
on a new programmer?  Anyone want to buy a Data I/O 2900 if we do go
ahead and get the BP-1200?

--
David	WU9A	dwg@glenqcy.glenayre.com


Article: 945
Subject: Overview of implementation technology
From: hauck@cs.washington.edu (Scott Hauck)
Date: Fri, 31 Mar 1995 18:42:30 GMT
Links: << >>  << T >>  << A >>
I'm looking for a good description/survey of VLSI implementation styles,
and was hoping someone on this group could give me a pointer.  What I
want is something that goes into the costs, capacities, and speeds of
standard cells, FPGAs, MPGAs, full-custom, etc.

Any pointers would be appreciated.

Scott Hauck
hauck@cs.washington.edu



Article: 946
Subject: NeoCad/Xilinx for AT+T ORCA users
From: chuckg@arnet.com (Chuck Gollnick x196)
Date: 31 Mar 1995 19:14:43 GMT
Links: << >>  << T >>  << A >>

 
 This is the preliminary response from AT&T to the Xilinx purchase of NeoCAD.
 
 "When AT&T entered into a licensing agreement with NeoCAD during the fourth
 quarter of 1994, we anticipated that something like this could happen, given
 the success of our ORCA family of FPGAs in the marketplace.  Since then, NeoCAD provided us with a copy of their source code, and our CAD development team has
 been working with that code, adding new features and enhancements.  Under the
 terms of our agreement with NeoCAD, AT&T is granted a full license to that
 source code in the event NeoCAD is acquired by an AT&T competitor."
 
 "For this reason, we feel this acquistition should be transparent to our
 customers.  AT&T has the resources and the commitment to provide the highest
 density, highest-performance FPGAs in the industry.  For example, we'll be
 moving our ORCA product line to 0.35 micron technology later this year,
 providing even higher-density and higher-speed devices."
 
 Frankly, what this is saying is that we have the source code and will continue
 to support the NeoCAD software.  We consider this as a hinderance from a
 software standpoint, but this is not going to deviate us from our scheduled
 releases.
 


Article: 947
Subject: Re: Excuse me while I vent about Data I/O & Abe
From: patm@fc.hp.com (Patrick Murphy)
Date: 1 Apr 1995 00:04:24 GMT
Links: << >>  << T >>  << A >>
Paul Hunter (phunter@mcc.com) wrote:
: I CAN'T CONDONE THIS ATTITUDE. ANY OTHERS WITH OPINIONS?


	Yes... please turn off your CAPS LOCK key, ok?

Thanks,
pjm


Article: 948
Subject: Re: Data I/O & BP programmers (was Excuse me ...)
From: roger@coelacanth.com (Roger Williams)
Date: 01 Apr 1995 00:32:31 GMT
Links: << >>  << T >>  << A >>
   We need to get a new programmer to support some larger devices
   (e.g. 84-lead PLCC Xilinx 7372) and are considering upgrading our Data
   I/O 2900 to a 3900 or purchasing a new BP-1200 from BP Microsystems.

We've been extremely pleased with both our BP-1200 and the support
from BP Microsystems.  Our experience with Data I/O had been about the
same as yours, and was an important motivation to buying the BP-1200
in the first place.

-- 
Roger Williams
Coelacanth Engineering  |  Numeric stability is probably not all
Middleborough, Mass     |  that important when you're guessing...


Article: 949
Subject: Re: Neocad merges with Xilinx
From: ksteele@cerfnet.com
Date: 1 Apr 1995 05:26:19 GMT
Links: << >>  << T >>  << A >>
>It is now confirmed from reliable sources that Xilinx has taken
>over Neocad this week to put an end to the competition for Xilinx
>P&R tools.
>
>-ASM.
 
I received a phone call today (Friday) from our Xilinx FAE to the same effect.
Mind you we just picked up the NeoCAD Catalyst toolset last week to work with
AT&T FPGAs.....

Having worked with both XACT 5.0 and NeoCAD, I have a hard time believing
that Xilinx will "off" the NeoCAD tools.  But how could they (will they) be able
to sell fitters for their competitors silicon?

KSteele@cerf.net    Motion Engineering, Inc.   Santa Barbara, CA 

 




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