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It's hard to believe that with the major shortage of good engineers these days, that a company can treat potential new hires like that! Man, if they treat you that way just for an interview, imagine what they might do to you if you're an actual employee! I wonder if they have urinals with built in drug testers that you have to punch your id code into to take a whiz - hey - that's not a bad product idea - please note the NDA below :) ----- Ron Huizen BittWare By reading this posting, you have implicitly agreed to not disclose any confidential and proprietary information that may be contained within, specifically any ideas related to urinals, drug testing, and the combination of these two technologies. rickman wrote: > I had my interview with company A this morning. It started out a little > uneven. I entered and was presented with the application, NDA and some > other paperwork to fill out. I was also asked to sign into the visitors > log. However the visitor's log was like none I had ever seen before. > Each visitor had an entire page with a three paragraph agreement to > sign. One of the paragraphs was a brief, but broadly worded NDA. Words > to the effect that I would not divulge any information that I obtained > while at this facility. > > I did not sign. > > I just filled in my name and other info and left it at that. > > I then proceded to fill in the application. When it came to the NDA, I > had decided that the best approach was to add a line to the NDA that > indicated that a written statement would be provided of all confidential > information divulged to me. > > When the first interviewer came to greet me, I spoke with him about my > concerns. He told me that no proprietary information would be shared > with me during the interview. I asked then if the NDA was not needed. > The receptionist said it was required. I stated my need for a written > statement of what was disclosed to me and the interviewer indicated that > this was not a problem. I added my line to the NDA and signed it. > > The interview proceded in the lunch room as they were doing mass > interviews and the conference rooms were all booked. We spoke for about > a half an hour during which I was told only superficial information > about their products and processes. > > A second interviewer began and presented me with a series of "test" > questions that were well thought out although a bit vague. This actually > simulated a real project rather well. Again, no information that could > be considered confidential was disclosed to me. > > The third interview was conducted by a pair of mechanical engineers who > almost immediately confessed that they were in no way qualified to test > my knowledge of EE work. So I took the lead and we discussed some of the > issues relating to integration of electromechanical systems. Nothing > proprietary was discussed. Only very general statements like, "we use > photodiodes to detect the light along with high gain amplifiers". > > The fourth interviewer was a person that I had spoken to on the phone. > We prepared to move to another building when a party of several people > entered and asked if I was Rick Cole. I identified myself and listened > to an explanation of why they were terminating the interview. When I > altered the NDA, I broke their policy so that they needed to get me out > of their building. They were polite about it, but it was clear that they > considered me a threat. So I left on good terms mentioning that they > were welcome to consider me for future consulting work. I am not sure if > I will be receiving a call anytime soon. ;) > > In retrospect, I think it would have been better if instead of changing > the NDA, which I could only expect to be met with considerable > resistance, I should have simply taken good notes and asked each > interviewer to sign. This would have been more likely to slip past > scrutiny and I would likely have an offer that I then would be able to > accept or turn down. > > The funny part was that on the way out they asked me to complete the > signout procedure. While doing that they noticed that I had not signed > the mini-NDA. This was pointed out. I pointed out that it was an NDA. I > was asked to sign it by the HR person. I could not help but laugh a bit. > I guess they thought I had as much nerve as I thought they did. > > Meanwhile I spoke to a manager from company B. They also have a NDA for > the interview. We discussed the issues of my signing an NDA and agreed > that the best thing would be to have the interview and for them to not > divulge any confidential information. > > So I will interviewing tomorrow with company B. We will see if the > manager was stepping beyond his bounds and I get the boot in the middle > of the interview. > > -- > > Rick Collins > > rick.collins@XYarius.com > > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design > > Arius > 4 King Ave > Frederick, MD 21701-3110 > 301-682-7772 Voice > 301-682-7666 FAX > > Internet URL http://www.arius.comArticle: 24726
Peter Alfke wrote:
> As I suppose you know, the functionality of the Spartan-II family has been
> available for over a year in the 2.5-V original Virtex family.
> Package options and speeds files are different, powerdown was added, and the
> family was extended downwards. And, perhaps most importantly, the price for
> this redesigned family is reduced rather drastically. I will investigate
> whether the delay ( I know there was a delay) is as bad as you see it.
>
> Anyhow, if you need to experiment, or even build prototypes, you can use
> Virtex for that. You may have to change the package, but that should be all.
> Remember also, in Xilinx you can use a bigger part to do the job of a smaller
> part, without a speed penalty.
Peter,
I assume that the above is simply the official statement. In fact, if I need
to cahnge packages in a high speed design it may qualify as a major redesign of a
system. For example I am using a XCS05XL in an 84 pin PLCC package at 200MHz.
If I change to a different package then who knows what the changes to the layout
will do to the system, plus the internal routing will be different. For this
reason, I do not like to verify the design with one package/part and then go to
production with a different part, which may or may not be available.
Fortunately, Xilinx parts have been fairly available in the older parts. If you
want to get into real problems look at analog parts. In particular look at
linear tech or analog devices part numbers. When you got to distribution for
small production runs you just get laughed at. (Not a "mean" sort of laugh but a
cynical "dream on" sort of laugh.) And they don't even have an alternative part
of any kind in many cases. My point, however, is that often a different package
or "similar" part is just not a realistic option, particularily for a small
production run.
>
>
> Peter Alfke, Xilinx Applications
Article: 24727In article <cuLm5.140992$1h3.2683949@news20.bellglobal.com>, "Dan" <daniel.deconinck@sympatico.ca> wrote: > Hello FPGA designers, > > Several years ago I attended a Xilinx promotional seminar hosted by the > local rep. > > One of the speakers was a regional sales manager. He promissed all > developers the 'one hundred piece price', on any 'single piece' purchase, > for all new prototype designs. This policy was said to be backed by the > distees. When I heard him present this offer, it sounded like a self > initiated policy that likely, would not receive suffcient administering to > be consumated. Have you talked with the person that made the original offer? Does he know Insight isn't honoring his offer? > (based on my stereo type of the sales person 'personality > type' and the character of this presenter) I could care less about the offer > ( I'll still take it) but I did learn something. > > Well, I brought this up with Insight several months later. They said, ' We > wouldn't do that. There is nothing in it for us....' (I countered, that > fostering a lasting profitable relationship may justify foregoing initial > profits but they just didn't buy it.) I was reminded of this conversation > recently when an Insight Xilinx FAE said to me, 'If you don't buy from us, > then why should I help you ?' I suspect (or at least hope) that this is a localized problem. We deal with Insight in Dallas and have no trouble at all dealing with them. Pricing is always decent and the FAE's don't have an attitude like you describe. They've been with us since the beginning of our project (4 years) and we are now one of their largest accounts. We've had a number of other distributors try to capture our business. It's kind of funny actually. They just expect you to start buying from them just because they ask you to. I have to admit though, that Avnet appears to have some real go-getter Xilinx FAE's and are willing to help even if you aren't buying from Avnet. So if we were to change, that's who I would probably try next. Marc Sent via Deja.com http://www.deja.com/ Before you buy.Article: 24728
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Hello Mr. Holle,
No! This is very interesting to me.
I have had little experience with NDAs and would I like to learn, what to
look out for and how to handle such a situation.
This is also part of an Engineers life/work (sadly, I would be happy to
work on tech stuff, but we live in the real world, and this goes with
it!).
Steve Holle wrote:
> On Mon, 14 Aug 2000 20:25:41 -0400, rickman <spamgoeshere4@yahoo.com>
> wrote:
> Is it possible that this discussion should be taken to another group?
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Article: 24729That's why you put a download cable connector on the board. That way you do your debug without blowing PROMs, then when you have a finished design you put it in ROM. Atmel has an EEPROM version if you want erasability. Vladislav Vasilenko wrote: > > But this series (XC17XX ) has some lack-it is one-time programmable > SPROM :( > >Article: 24730
steveh@link-comm.com (Steve Holle) writes: > Is it possible that this discussion should be taken to another group? I think it's fine in comp.dsp. I can't speak about the other groups. Ciao, Peter K. -- Peter J. Kootsookos Wb: www.clubi.ie/PeterKArticle: 24731
> > I finally succeeded to buy two chips from Memec in GB. We get our Altera parts from Impact Memec in the UK, and get a pretty good service from them. I've bought Xilinx parts to play with at home from Insight Memec, and they are very good, also, giving me our company discount for small quantities, as does Impact for small quantities of Altera devices. Leon -- Leon Heller, G1HSM Tel: (Mobile) 079 9098 1221 (Work) +44 1327 357824 Email: leon_heller@hotmail.com Web: http://www.geocities.com/SiliconValley/Code/1835 Sent via Deja.com http://www.deja.com/ Before you buy.Article: 24732
Hi.
I did not make an implementation with Xilinx devices and also
Symplify before.So, this is the problem:
How can I instantiate the Block SelectRAMs (or any other blocks
inside device) in Verilog Code?
Thanks,
SEDAT
Article: 24733rickman wrote: > > OneStone wrote: > > I do embedded systems, I'm mad. I work ludicrous hours, I drink caffeine > > and have the worlds most disturbed diet. I consider psychology and > > psychiatry one rung at least below witch doctors. I don't do psych > > tests, pee in bottles or sign anything to get an interview and neither > > should anyone else have to. At the end of the day there is a world wide > > shortage of good engineers so if they get too obnoxious with their tests > > they won't find many takers, and will end up the losers. > > If you have not been reading Ayn Rand, you should... > > Try "Atlas Shrugged". > > -- > > Rick Collins > Never heard of the author. Other than trade papers, tech manuals and scientific papers I like to keep my reading light. I presume from the "Atlas Shrugged" quote that the implication is that the employers don't care about my attitude, they are big enough not to bother, and will always find mugs who are prepared to compromise. Fine, let them employ mugs. Employ mugs, get coffee. Simple. AlArticle: 24734
Where can I find techical information about this Atmel EEPROM ? Best regards, Vlad. Ray Andraka wrote: > > That's why you put a download cable connector on the board. That way you do > your debug without blowing PROMs, then when you have a finished design you put > it in ROM. Atmel has an EEPROM version if you want erasability. > > Vladislav Vasilenko wrote: > > > > But this series (XC17XX ) has some lack-it is one-time programmable > > SPROM :( > > > >Article: 24735
rickman <spamgoeshere4@yahoo.com> wrote: > I am interviewing for jobs and I am finding more than one company that > wants me to sign a non-disclosure (ND). This is strange. I have passed over 100 interviews and have never been asked to sign one. I've been to small, medium and large companies; the tendency to be paranoid is more fitting the smaller companies. Such an attitude has always been suspicious to me whether such a company worth anything. As I'm also paranoid :-), my advice would be "don't sign anything you don't agree with". However, as somebody else have said, if they pay you to sign, you may sign it (repending on the terms, of course). > This is disturbing to me since > it puts me in a difficult position. Let's say I sign a ND with company A > and take a job with company B who is a direct competitor. I end up > working on a project similar to the one that company A told me about. So > because I interviewed with company A I am now liable for a lawsuit? Yes and no. Yes, because virtually everybody can be sued for virtually anything. In reality it only matters if you can win the case and if it gives you anything. Signing an NDA doesn't oblige you for a non-competition (it's a separate document). At best the company A can sue company B for technology stealing and you for violating the NDA. They will be seeking commercial damages from the company B and an order preventing you from working for B but they will still have a hard time proving anything. > Is this what a lot of companies are doing now? Are interviewees > generally willing to sign such agreements? Personally I have been asked to sign an NDA only along with a job contract. And for the second question - no, also because it lowers your position in negotiations. > Now they want you to sign away the right to work on a competing product > just to get an interview? In a highly competitive hi-tech environment I wonder how companies can allow themselves such things. You should think again if you believe this company deserves any further negotiations. /VD Programming links at: -- http://bphantom.hypermart.net -- Tripple DOS home at: -- http://bphantom.hypermart.net/tridos.html -- Executing Inspector home at: -- http://members.xoom.com/wbphantoms/Inspector/inspect.html -- -- I hate you and you hate me And everybody smiles --- [R.J. DIO] Sent via Deja.com http://www.deja.com/ Before you buy.Article: 24736
In article <399B6852.6915C43D@earthlink.net>, Peter Alfke <palfke@earthlink.net> wrote: >Remember also, in Xilinx you can use a bigger part to do the job of a smaller >part, without a speed penalty. Sorry, peter, but I can't resist: "And remember also, we in Xilinx like it when you use a bigger part to do the job of a smaller part". ALthough overengineering/overbuying the FPGA in a prototype probably is good practice anyway. -- Nicholas C. Weaver nweaver@cs.berkeley.eduArticle: 24737
I think that you've basically come up with your own best answer to the problem. The first part is, don't sign one if you don't have to, second, if a company requires you to sign a NDA, take good notes during the interview. Tell the person doing the interview to stamp their foot or make big finger quotes in the air when they are telling you something that is company confidential. Write everything down that the person points out and then have them sign it. Better yet, tape record it (although they might not be so kean on this idea). At least this way, you'll know exactly what they consider confidential. I find this all kinda interesting considering I find myself on the opposite end of the scale, if I was to go for an interview I wouldn't be able to talk much about my abilities/areas of work because of the security issues involved in my present work...and I doubt they would sign a NDA from me. rickman <spamgoeshere4@yahoo.com> wrote in message news:399B61DE.AD7F85A5@yahoo.com... > I had my interview with company A this morning. It started out a little > uneven. I entered and was presented with the application, NDA and some > other paperwork to fill out. I was also asked to sign into the visitors > log. However the visitor's log was like none I had ever seen before. > Each visitor had an entire page with a three paragraph agreement to > sign. One of the paragraphs was a brief, but broadly worded NDA. Words > to the effect that I would not divulge any information that I obtained > while at this facility. > > I did not sign. > > I just filled in my name and other info and left it at that. > > I then proceded to fill in the application. When it came to the NDA, I > had decided that the best approach was to add a line to the NDA that > indicated that a written statement would be provided of all confidential > information divulged to me. > > When the first interviewer came to greet me, I spoke with him about my > concerns. He told me that no proprietary information would be shared > with me during the interview. I asked then if the NDA was not needed. > The receptionist said it was required. I stated my need for a written > statement of what was disclosed to me and the interviewer indicated that > this was not a problem. I added my line to the NDA and signed it. > > The interview proceded in the lunch room as they were doing mass > interviews and the conference rooms were all booked. We spoke for about > a half an hour during which I was told only superficial information > about their products and processes. > > A second interviewer began and presented me with a series of "test" > questions that were well thought out although a bit vague. This actually > simulated a real project rather well. Again, no information that could > be considered confidential was disclosed to me. > > The third interview was conducted by a pair of mechanical engineers who > almost immediately confessed that they were in no way qualified to test > my knowledge of EE work. So I took the lead and we discussed some of the > issues relating to integration of electromechanical systems. Nothing > proprietary was discussed. Only very general statements like, "we use > photodiodes to detect the light along with high gain amplifiers". > > The fourth interviewer was a person that I had spoken to on the phone. > We prepared to move to another building when a party of several people > entered and asked if I was Rick Cole. I identified myself and listened > to an explanation of why they were terminating the interview. When I > altered the NDA, I broke their policy so that they needed to get me out > of their building. They were polite about it, but it was clear that they > considered me a threat. So I left on good terms mentioning that they > were welcome to consider me for future consulting work. I am not sure if > I will be receiving a call anytime soon. ;) > > In retrospect, I think it would have been better if instead of changing > the NDA, which I could only expect to be met with considerable > resistance, I should have simply taken good notes and asked each > interviewer to sign. This would have been more likely to slip past > scrutiny and I would likely have an offer that I then would be able to > accept or turn down. > > The funny part was that on the way out they asked me to complete the > signout procedure. While doing that they noticed that I had not signed > the mini-NDA. This was pointed out. I pointed out that it was an NDA. I > was asked to sign it by the HR person. I could not help but laugh a bit. > I guess they thought I had as much nerve as I thought they did. > > > Meanwhile I spoke to a manager from company B. They also have a NDA for > the interview. We discussed the issues of my signing an NDA and agreed > that the best thing would be to have the interview and for them to not > divulge any confidential information. > > So I will interviewing tomorrow with company B. We will see if the > manager was stepping beyond his bounds and I get the boot in the middle > of the interview. > > > -- > > Rick Collins > > rick.collins@XYarius.com > > Ignore the reply address. To email me use the above address with the XY > removed. > > > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design > > Arius > 4 King Ave > Frederick, MD 21701-3110 > 301-682-7772 Voice > 301-682-7666 FAX > > Internet URL http://www.arius.comArticle: 24738
Theron Hicks wrote: > snip > My point, however, is that often a different package > or "similar" part is just not a realistic option, particularily for a small > production run. > I was not being "official", just trying to point out some potential stopgap band-aid. Virtex-II will be available, there should not be any doubt about that. Peter AlfkeArticle: 24739
Dmitri Katchalov <dmitrik@my-deja.com> wrote: > And what if your new boss tells you "we are considering adding > feature ABC to our product. In your opinion, shall we do this?" > And how can you prove later on that your decision regarding > feature ABC was not influenced by the knowledge gained at your > recent job interview? It's not the case, the case is if you tell the latter (competitor) company that the former is using this technology (and it's not a publically available information). If you are just using such an information in some form in your further work, it's not a subject for an NDA. It's usually a subject of a separate no-competition paragraph in a job contract which is usually limited to 1.5 - 2 years. /VD Programming links at: -- http://bphantom.hypermart.net -- Tripple DOS home at: -- http://bphantom.hypermart.net/tridos.html -- Executing Inspector home at: -- http://members.xoom.com/wbphantoms/Inspector/inspect.html -- -- I hate you and you hate me And everybody smiles --- [R.J. DIO] Sent via Deja.com http://www.deja.com/ Before you buy.Article: 24740
I've been using the Embedded Solutions RC1000-PP board for high gate count 3D graphics applications, and have found it to be an excellent platform. http://www.embeddedsol.com/technology/info_sheets/info_sheet_02.htm For my application, the strengths of the platform lie in High gate count - Xilinx Virtex 1000 High on-board memory bandwidth - 4 parallel memory banks, each 2MB 32 bit Fast communication to and from board - bus master PCI ( 132 Mbytes/sec ) Fast FPGA reconfiguration - support for SelectMAP parallel reconfiguration mode Flexible I/O - 2 PMC sites, and a 50 pin unassigned header ( which I've used as an additional communication link in an image processing application which required two boards ! ) Comprehensive and flexible control software In fact, at IEEE FCCM this year I saw no other prototyping platform which could support my work. Starry Hung wrote: > > Hi, > > I am going to buy some prototyping boards with high gate count FPGA such > as Xilinx Virtex or Altera APEX, and would like to hear more suggestions > from you gurus. Xilinx or Altera? Which board is good? etc. > > Thanks, > > - starry.Article: 24741
rickman <spamgoeshere4@yahoo.com> wrote: > I had my interview with company A this morning. It started out a little > uneven. [...] I must admit, the whole thing is sounding a little odd. I'm a software, not hardware developer myself but I don't think the companies' policies differ much in this aspect... The only thing I was ever asked to sign (and signed) at job interviews was the elementary personal and contact info, which mostly duplicated the one I had given in the CV. Also it's probably worth mentioning that I'm reviewing every document which I'm asked to sign with my lawer, if some half a line in the paper rises my suspects. This happens mostly with contracts and ends up with my lawer changing almost half of the document :-) I did it for the first time when I went from one comany to its indirect competitor; so I wanted the lawer to make the contract compatible with my earlier no-competition agreement. I highly recommend to all hi-tech people checking any ambiguous documents with a legal person, even if you have an experience with such documents. Regarding your performance on the interview I'd like to congratulate you. These pig-headed interviewers usually try to ask you questions which they don't know the answers for - and thus get a free consultation. /VD Programming links at: -- http://bphantom.hypermart.net -- Tripple DOS home at: -- http://bphantom.hypermart.net/tridos.html -- Executing Inspector home at: -- http://members.xoom.com/wbphantoms/Inspector/inspect.html -- -- I hate you and you hate me And everybody smiles --- [R.J. DIO] Sent via Deja.com http://www.deja.com/ Before you buy.Article: 24742
Hi Everyone. Does anyone know how to access an internal signal or a port in VHDL when doing a simulation with a VHDL testbench? I have instantiated a block within my top level VHDL design and I would like to monitor some of its internal signals and some of its ports. My aim is to write the observed values to a file using a VHDL testbench since it will be easier for me to compare the results in a spreadsheet program. I am already able to write the inputs and outputs for the top level design instantiated as a unit-under-test (UUT) in the VHDL testbench (all the ports are visible and I can assign them to a signal that I declare in the testbench). My problem is how to access signals internal to that UUT. I am able to access these internal signals within the simulator's graphical view, but I cannot export that information in a readable format using the simulator's menus. Is there a way to achieve what I want using the VHDL syntax directly within the VHDL testbench? Thanks in advance for your help. NestorArticle: 24743
http://www.atmel.com Vladislav Vasilenko wrote: > > Where can I find techical information about this Atmel EEPROM ? > Best regards, Vlad. > > Ray Andraka wrote: > > > > That's why you put a download cable connector on the board. That way you do > > your debug without blowing PROMs, then when you have a finished design you put > > it in ROM. Atmel has an EEPROM version if you want erasability. > > > > Vladislav Vasilenko wrote: > > > > > > But this series (XC17XX ) has some lack-it is one-time programmable > > > SPROM :( > > > > > > -- -Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com or http://www.fpga-guru.comArticle: 24744
Peter Alfke wrote: > But remember to order the proper speed grade, and to keep the junction > temperature below the guaranteed 85 degrees C. You are very close to the > edge, but we guarantee our worst-case numbers. :-) > Thanks for your prompt and helpful answer to my question, Peter. The April 7, 2000 data sheet from the Xilinx web site shows only the -5 speed grade. Probably the real limitation is how fast I can generate write addresses? There is a brief description of what I'm trying to do with the Dual Port RAM at: http://dustbunny.physics.indiana.edu/~paul/hallDrd/ Also, I don't find stock on the XC2S30 anywhere, although Insight has a few XC2S50. Is there a virtex equivalent for the XC2S30? I notice from the newsgroup, other people are wondering about availability of these parts. PaulArticle: 24745
what is the bit rate of the stream, and what is the fastest clock you have available? The higher the ratio, the easier the job is. Basically you are looking at a DPLL (digital phase lock loop) design. In simple terms, the DPLL is for the most part a counter whose modulus is adjusted slightly if the terminal count doesn't line up with the next bit edge. oivan@my-deja.com wrote: > > Hi, > Has anyone designed circuit that performs clock recovery from serial > data stream, in FPGA. I would appreciate any info. > Thanks. > > Sent via Deja.com http://www.deja.com/ > Before you buy. -- -Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com or http://www.fpga-guru.comArticle: 24746
"Nestor" <nestor@ece.concordia.ca> writes: > Hi Everyone. > > Does anyone know how to access an internal signal or a port in VHDL when > doing a simulation with a VHDL testbench? I have instantiated a block > within my top level VHDL design and I would like to monitor some of its > internal signals and some of its ports. My aim is to write the observed > values to a file using a VHDL testbench since it will be easier for me to > compare the results in a spreadsheet program. I am already able to write > the inputs and outputs for the top level design instantiated as a > unit-under-test (UUT) in the VHDL testbench (all the ports are visible and I > can assign them to a signal that I declare in the testbench). > > My problem is how to access signals internal to that UUT. I am able to > access these internal signals within the simulator's graphical view, but I > cannot export that information in a readable format using the simulator's > menus. Is there a way to achieve what I want using the VHDL syntax directly > within the VHDL testbench? > > Thanks in advance for your help. > > Nestor Nestor, a solution that worked well for me is to assign the values to be monitored to package-resident signals. For more details see: http://vhdl.org/comp.lang.vhdl/FAQ1.html#monitor Best, -ArrigoArticle: 24747
In every case I have come across there was nothing proprietary given to me at an interview. I just got back from an interview where I requested that they not use the NDA and not disclose information. It was not a problem. I got what I needed and they certainly were not limited in what they could ask me. You can talk in general about the need to discuss proprietary info, but there is seldom the case for it. "¸.·´¯`·.¸.·>Strings" wrote: > > I guess you've never had to protect your assets? > To say "stupid" is short-sighted. Sorry. There > are situations that warrant protection. > > Jon Kirwan <jkirwan@easystreet.com> wrote in message > > It's still stupid to sign one for an interview, in my opinion. > > > > Jon -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 24748
"¸.·´¯`·.¸.·>Strings" wrote: > > I'm not exposing myself to a potential lawsuit unless I disclose > information. > It's not as difficult as you might think. Nor as dangerous. > The problem with newsgroups is the topic gets too hyped up. I agree that it is not a sword hanging over your head. But I feel it is a real danger. If you don't know what info is considered confidential, then you may disclose something that you shouldn't. But even if you don't disclose anything, the company may think you have and you can wind up in court. I don't know what really happens in court, but the document I was asked to sign indicated that I had to prove my case rather than them proving theirs. They even stated that the damages were "more than just monetary". > In fact, a great way to handle the situation is to tell people that > you are interviewing with multiple companies. The ball actually is in their > court > to not tell you too much stuff. It MAY prevent an interview. It should be > on paper. > That is the choice you make. Oh well. But it AIN'T THAT BAD. Sure you can shrug and sign. But company A was being so paranoid that they made *ALL* visitors of any type to sign an NDA in the visitor log. It would seem that they have a problem with not revealing "too much" stuff. Why would they do all this if they don't intend to enforce their actions in court? -- Rick Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design Arius 4 King Ave Frederick, MD 21701-3110 301-682-7772 Voice 301-682-7666 FAX Internet URL http://www.arius.comArticle: 24749
Actually, it's a very interesting and relevant discussion. If you are using Netscape, please press the 'k' key now. rk Steve Holle wrote: > On Mon, 14 Aug 2000 20:25:41 -0400, rickman <spamgoeshere4@yahoo.com> > wrote: > Is it possible that this discussion should be taken to another group?
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