Site Home   Archive Home   FAQ Home   How to search the Archive   How to Navigate the Archive   
Compare FPGA features and resources   

Threads starting:
1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015JanFebMarAprMayJunJulAugSepOctNovDec2015
2016JanFebMarAprMayJunJulAugSepOctNovDec2016
2017JanFebMarApr2017

Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Custom Search

Messages from 2725

Article: 2725
Subject: Re: XILINX XACT 6.0.0 Tools flaky
From: tliehe@rainbow.rmii.com (Tom Liehe)
Date: 30 Jan 1996 17:20:24 GMT
Links: << >>  << T >>  << A >>
I've been discussing this topic via email with a person who does not
wish to be indentified, but who has provided the following comment
with permission for me to post it:


Xilinx hasn't changed the structure of their core tools for many years
as you can tell by watching what the programs do, especially if you
are familiar with PPR's intermediate files from the hard macro
days. Porting this struct to the Windows DOS box seems to us
advanced users a bad technical decision as far as robustness and
performance, but given the architecture of their existing tools it makes
some sense that perhaps they couldn't have done anything different to
ship a Windows product in the near term. My solution is just not to use
the Windows interface. XACT 5.2 under DOS works just fine.

It will be interesting to see how the new Neocad based tools
work. Could it be that Xilinx bought Neocad strictly because they
know how to write software better, as opposed to how to write better
software?
--
Tom Liehe - tliehe@rmi.net - toml@metrum.com


Article: 2726
Subject: Re: GAL programming for hobby use...Is there no hope?
From: rxjf20@email.sps.mot.com (Doug Shade)
Date: 30 Jan 1996 21:01:12 GMT
Links: << >>  << T >>  << A >>
Try Needham Electronics
(usually advertise in the back of EE Times)... they have something
for under $200.

Lattice has an In Circuit Programmable kit for 'round $90, that
includes
there spin of a 22V10.

Doug Shade
rxjf20@email.sps.mot.com


Article: 2727
Subject: Re: GAL programming for hobby use...Is there no hope?
From: bob@mcn.org (Bob Blick)
Date: 31 Jan 1996 01:05:59 GMT
Links: << >>  << T >>  << A >>
In article <mark.stephens-2901961009190001@mstephens.gsfc.nasa.gov>, 
mark.stephens@gsfc.nasa.gov says...

>Do I need to get another programmer or can one home brew for a specific 
chip?

Elektor magazine did a project article for a GAL programmer(other magazines 
may have also). I built it, and they had a later article with an add-on for 
the 22V10 GAL.

Elektor is no longer printed in this country, but Old Colony Sound Labs 
carries back issues, and PC boards, and the software. Old Colony's phone 
number is (603)924-6371. The issue with the original article was May 1992. 
The PC board was $19 and the software was also $19. I forget how much the 
22V10 upgrade was. There were no really exotic parts in the original design. 
The upgrade has an A/D converter that's about $10 from Farnell Components.

Email me if you have any questions.

bblick@execpc.com




Article: 2728
Subject: Re: Programming Actels in circuit?
From: allanm@idirect.com (Allan Macneil)
Date: 31 Jan 96 02:49:02 GMT
Links: << >>  << T >>  << A >>
In article <hersman.821993240@aplcomm.jhuapl.edu>, 
hersman@aplcomm.jhuapl.eduļ says...
>
>Does anyone know of a way to program an Actel FPGA in the circuit?
>
>I am aware that even if it is possible, it's not straight forward.
>
>Chris Hersman

If Actels are specifically required check out the Lattice ISP family for 
extremely simple in ciruit programing.



Article: 2729
Subject: Re: GAL programming for hobby use...Is there no hope?
From: eric@wolf359.exile.org (Eric Edwards)
Date: Wed, 31 Jan 1996 04:21:09 GMT
Links: << >>  << T >>  << A >>
In article <4eji8k$n4i@newsbf02.news.aol.com>, Jim Drew writes:

> Dump the GALs, they are absolutely worthless and expensive.

PEELs are only moderately more capable than GALs.  PEEL Arrays are nicer
but vertually unobtainable from hobbyist sources.

JDR and Jameco price GAL22V10-25 and PEEL22V10-25's exactly the same:
$4.95

ICT's software is free but it is also buggy and PEEL's are not well
suported by third parties.  

That said, PEEL's are usefull and really don't even have to choose. 
PEEL's are JDEC compatible with GAL's.  Most low cost device programmers
will handle both.  So get you PEELs.  Use them as PEEL's or GAL's
whichever way suites.  I use a EE Tools Allmax with Intel/Altera's
PLDshell and/or ICT's PLACE.  I prefer PLDshell but I need PLACE to take
advantage of the extra PEEL features (like bi-directional I/O)

> PEELs provide a wide range of different Macro Cells, making them much more
> versatile than GALs.  They are about .75 cents for an 18CV8 and about
> $1.75 for a 22CV10 (although I pay less than this for 1000+ quantities).

Where are you finding 22V10's for $1.75?  Are you still talking large
quantities?

----
"Not many fishes, in the sea.  Not many fishes, just Londo and me"
Remember the home hobbyist computer: Born 1975, died April 29, 1994



Article: 2730
Subject: Re: GAL programming for hobby use...Is there no hope?
From: rst-engr@oro.net (Jim Weir)
Date: Wed, 31 Jan 1996 05:16:33 GMT
Links: << >>  << T >>  << A >>

Sigh...

Most of 'em want a committment, not just for hobby use.  If you find a
couple of them that will put up with fooling around on weekends, would
you post addresses?

<gdr>

Jim


Jim Weir VP Engineering  | You bet your sweet patootie I speak
RST Engineering          | for the company.  I OWN the cotton-
Grass Valley CA 95945    | pickin' company.
voice/fax 916/272-1432   | AR Adv. WB6BHI               Cessna 182A N73CQ
rst-engr@oro.net         | Comm'l Pilot & CFI Airplane/Glider  A&P Mechanic



Article: 2731
Subject: Re: GAL programming for hobby use...Is there no hope?
From: mmartin950@aol.com (MMartin950)
Date: 31 Jan 1996 04:50:32 -0500
Links: << >>  << T >>  << A >>
You may take a look at http://www.aaeon.com.  There is a univeral
programmer good for EPROM, PEEL, GAL, FPGA etc.................  Several
pages of the device list that it can program.  Its price is very very low
comparing to its performance.  I got one in the lab and it works perfect.


Article: 2732
Subject: Re: How Big Chips Will Be Designed In The Not Too Distant Future
From: verschue@eb.ele.tue.nl (Ad Verschueren)
Date: 31 Jan 1996 11:52:02 GMT
Links: << >>  << T >>  << A >>
In article <4e8ed3$boc@agate.berkeley.edu>,
Steve Pope <spp@bob.EECS.Berkeley.EDU> wrote:
>verschue@eb.ele.tue.nl (Ad Verschueren) replise to my post,
>
>>>This is because whenever a design shop designs a chip for one
>>>customer, its elements then become potential "off the shelf cores" for
>>>the next customer.    Problem is, the actual level of circuit
>>>re-use is always lower than one hopes.   Rule of thumb -- if you
>>>can get by with less than half of a design being newly-designed
>>>circuitry, you're doing really well.
>
>| In my experience, the amount of curcuit re-use increases
>| tremendously when you are allowed to make (small) modifications
>| to a previous design - and I don't mean setting a few parameters
>| differently here... We do have large groups of students working
>| and learning here using our own tools, and they are copying and
>| pasting all over the place. Everything they made over the last
>| couple of years is placed in a central depository, we do not
>| allow anything in there which is not thoroughly documented (both
>| on paper and within the designs themselves). Not only complete
>| designs are open for re-use, but also any sub-part of a design
>| can be copied in separation.
>
>I agree that you are describing techniques that serve to increase
>re-use.   But I'll stand by my estimate that anything better than
>50% re-use -- for REQUIREMENTS DRIVEN projects -- is really
>pretty good, even with the techniques you mention.
>
I agree, 50% re-use is very good, but we should try to get it even much
higher - for any kind of project...

>Of course, for RESOURCE DRIVEN projects, you will get more re-use
>more readily.  (e.g., "What cores do I already have, and what
>can I design with them" -- i.e. a typical university situation.)
>
I do give a course in industry on system synthesis. One of the main motto's
is 'do not design anything new unless it is really necessary'. The method
derives a system hardware architecture from an existing functional descrip-
tion by moving pieces of functionality around, combining them in modules
for which 'preliminary implementation choices' must be made in the process.

This way, the requirements in the functional description are matched against
the resources as much as possible. I always ask the audience to generate a
list of implementations (for data processing/storage *and* communication)
they know they can use - it is surprising to see how quickly a (sometimes
huge) list they can produce.

Even though I state in the course that a method like this should be supported
by appropriate design entry/modification/analysis/simulation tools (which
are, sadly, not yet available...), feedback I get indicates the philosophy
works.

The main problem is not only that a (if possible, large) number of
existing designs must be available in an easy to access and parametrise/
modify form (the 'resources') - at least as large a problem is the fact
that it becomes difficult to choose the 'optimal' implementation given an
amount of functionality to implement.

This matching process gets more difficult when the list of available
implementations grows, especially if all kinds of modifications/extensions
are allowed. If the list of resources is treated like a 'company asset',
open for everybody within the company for re-use (like it should be...),
you can get the situation that not all the designers know everything about
all the available implementations within the company (I do know some horror
stories about people working in the same building in a large company 'nearby'
who were designing almost the same stuff without knowing from eachother).

They should be able to decide, though, that a specific implementation is usable
for their problem. This decision should be easy to take, too - if you have
a list of a few hundred implementation methods, you don't wanna spend an
hour on each of them figuring out if they are suitable.

Our proposed solution to this problem is to abstract the requirements and
implementation capabilities into a number of key figures and match on those
figures. We intend to do the abstraction process automatically with analysis
tools and have already shown that this is -in principle- possible.

>Steve

Ad

-- 
--(dr.ir.) Ad (A.C.) Verschueren-----------------------VERSCHUE@EB.ELE.TUE.NL--
  Eindhoven University of Technology   Digital Information Processing Systems
  Smail: Room EH 10.26 ---- P.O. Box 513 ---- 5600 MB  Eindhoven, Netherlands
  Voice: +31-40-2473404  FAX: +31-40-2448375  [corner for rent, apply within]


Article: 2733
Subject: Re: GAL programming for hobby use...Is there no hope?
From: wen-king@myri.com (Wen-King Su)
Date: 31 Jan 1996 06:40:24 -0800
Links: << >>  << T >>  << A >>
In a previous article mark.stephens@gsfc.nasa.gov (Mark Stephens) writes:
>
<I'd really, really like to get rid of the NOR gate glue logic and replace
>it with some species of GAL.  I have PLDasm and it's manual and can now
<create the JDEC files.  Unfortunately, my PROM programmer is just that...
>PROMs only.  
<
>Do I need to get another programmer or can one home brew for a specific chip?

Lattice makes a 22V10 equivalent that is in-circuit reprogrammable via
serial down load cable.  No special voltage is required, and you can make
the down load cable yourself and hook it up to the printer port of your PC. 


Article: 2734
Subject: Re: GAL programming for hobby use...Is there no hope?
From: mark.stephens@gsfc.nasa.gov (Mark Stephens)
Date: Wed, 31 Jan 1996 11:25:23 -0500
Links: << >>  << T >>  << A >>
Thanks for all the great responces!  

I've been avoiding this but looks like the "best" path is to get an ol'
286/386 box and a card based programmer.  If the Mac only had a parallel
port...sigh.

mark

-- 
mark stephens                                    "In constraint,
NASA GSFC Code 521                                is freedom"
Greenbelt, MD
(301) 286-4269         mark.stephens@gsfc.nasa.gov


Article: 2735
Subject: Re: XILINX XACT 6.0.0 Tools flaky
From: garyk@svpal.svpal.org (George Noten)
Date: 31 Jan 1996 17:00:11 GMT
Links: << >>  << T >>  << A >>
Tom Liehe (tliehe@rainbow.rmii.com) wrote:
: I've been discussing this topic via email with a person who does not
: wish to be indentified, but who has provided the following comment
: with permission for me to post it:


: Xilinx hasn't changed the structure of their core tools for many years
: as you can tell by watching what the programs do, especially if you
: are familiar with PPR's intermediate files from the hard macro
: days. Porting this struct to the Windows DOS box seems to us
: advanced users a bad technical decision as far as robustness and
    
    I agree 100%

: performance, but given the architecture of their existing tools it makes
: some sense that perhaps they couldn't have done anything different to
: ship a Windows product in the near term. My solution is just not to use
: the Windows interface. XACT 5.2 under DOS works just fine.

   I am doing exactly this.

: It will be interesting to see how the new Neocad based tools
: work. Could it be that Xilinx bought Neocad strictly because they
: know how to write software better, as opposed to how to write better
: software?
: --
: Tom Liehe - tliehe@rmi.net - toml@metrum.com


Article: 2736
Subject: Re: How Big Chips Will Be Designed In The Not Too Distant Future
From: tedwards@Glue.umd.edu (Thomas Grant Edwards)
Date: 31 Jan 1996 12:48:17 -0500
Links: << >>  << T >>  << A >>
I wonder if we'll see more "object oriented" high-level design languages.

I don't see any problem with automating design of >10M chips, given the rise
of computational power.  But the high-level object descriptions might be
re-used.

-Thomas



Article: 2737
Subject: Re: GAL programming for hobby use...Is there no hope?
From: books@rtssec1.dms.state.fl.us (Roger Books)
Date: 31 Jan 1996 18:09:34 GMT
Links: << >>  << T >>  << A >>
MMartin950 (mmartin950@aol.com) wrote:
> You may take a look at http://www.aaeon.com.  There is a univeral
> programmer good for EPROM, PEEL, GAL, FPGA etc.................  Several
> pages of the device list that it can program.  Its price is very very low
> comparing to its performance.  I got one in the lab and it works perfect.

If you actually saw my response to this before it died (because I killed
my article) please ignore my complaints about their home page.  It works
fine, as long as you use Netscape.  You can't get product listings if you
use mosaic.

Roger


Article: 2738
Subject: Xilinx or Altera?
From: Stephen Bell <sbell@stephenb.demon.co.uk>
Date: Wed, 31 Jan 1996 19:59:48 +0000
Links: << >>  << T >>  << A >>
I would be grateful for anyone's views on which they prefer; the Xilinx
or Altera range of FPGA's. I am at present using the Xilinx XACT
software however the sales rep made quite a case for Altera (obviously!)
and I must admit the software sounded quite impressive. I would like to
know has anyone made the move from xilinx to Altera and if so do they
think it was the right move?
I would appreciate it if I could also have email replies, I will post a
summary back to the group, my service provider is quite slow on the news
access at the moment so sometimes I do not get all the threads.

Thanks, 
 
-- 
Stephen Bell


Article: 2739
Subject: Xilinx or Altera for Newbie?
From: tartis@world.std.com (Tad B Artis)
Date: Wed, 31 Jan 1996 20:24:05 GMT
Links: << >>  << T >>  << A >>
I'm upgrading a 6-pal Atmel 2500 CUPL design to a FPGA type device.

I'm thinking of using Xilinx XC3164 or an Atmel 8636 (need 300-400 ff).

I intend to implement using mostly Boolean/state machine text descriptions
but I have orcad sw; and I'll want to have some explicit control over 
resource usage.

I think my two greatest concerns should be chip availability & especially,
design software performance/usability/bugs (maybe cost if above 2-3k).

Any feedback will no doubt add weeks of quality time to my life.  THANKS!


Article: 2740
Subject: Re: GAL programming for hobby use...Is there no hope?
From: jimdrew@aol.com (Jim Drew)
Date: 31 Jan 1996 18:41:34 -0500
Links: << >>  << T >>  << A >>
>> Dump the GALs, they are absolutely worthless and expensive.
>
>PEELs are only moderately more capable than GALs.  PEEL Arrays are nicer
>but vertually unobtainable from hobbyist sources.

PEEL are far more versatile than GALS, as each output can be a different
MACROCELL,
unlike GALs.  PEELs also use far less current than GALs, and have a much
better
source/sink ability.  The max clock rate of PEELs is also much higher than
GALs.
Bi-directional I/O, internal feedback (which can be latched), etc... lots
of goodies
that GALs are missing.

>JDR and Jameco price GAL22V10-25 and PEEL22V10-25's exactly the same:
>$4.95

What do you expect from places like these?

>ICT's software is free but it is also buggy and PEEL's are not well
>suported by third parties.  

Huh?  I have been using the PLACE software for 4 years now, making dozens
of different
18CV8 and 22CV10 designs, and I have yet to see a single bug (I am an
assembly
language programmer, so I do know what bugs are!).

>That said, PEEL's are usefull and really don't even have to choose. 
>PEEL's are JDEC compatible with GAL's.  Most low cost device programmers
>will handle both.  So get you PEELs.  Use them as PEEL's or GAL's
>whichever way suites.  I use a EE Tools Allmax with Intel/Altera's
>PLDshell and/or ICT's PLACE.  I prefer PLDshell but I need PLACE to take
>advantage of the extra PEEL features (like bi-directional I/O)

They are JDEC format, but not pin or MACROCELL compatible.

> PEELs provide a wide range of different Macro Cells, making them much
more
> versatile than GALs.  They are about .75 cents for an 18CV8 and about
> $1.75 for a 22CV10 (although I pay less than this for 1000+ quantities).

Where are you finding 22V10's for $1.75?  Are you still talking large
quantities?

I pay about $1.45 for 22CV10s and $.65 for 18CV8s in 1000 lots.  I can
order as
little as 100 for the $1.75 price, but I do buy factory direct.

Jim Drew, Utilities Unlimited International, Inc.


Article: 2741
Subject: Re: GAL programming for hobby use...Is there no hope?
From: jimdrew@aol.com (Jim Drew)
Date: 31 Jan 1996 18:42:12 -0500
Links: << >>  << T >>  << A >>
>I've been avoiding this but looks like the "best" path is to get an ol'
>286/386 box and a card based programmer.  If the Mac only had a parallel
>port...sigh.

It can.  There are several programmers for the MAC that use a parallel
interface.
You use the PowerPrint cable (which converts the 8 pin mini-din to
parallel) with
these devices.

Jim Drew, Utilities Unlimited International, Inc.



Article: 2742
Subject: Re: GAL programming for hobby use...Is there no hope?
From: wa1hoz@a3bbak.nai.net (Gerry Belanger)
Date: 1 Feb 1996 02:33:00 GMT
Links: << >>  << T >>  << A >>
Jim Drew (jimdrew@aol.com) wrote:
: Dump the GALs, they are absolutely worthless and expensive.

: Go with PEELs.  Contact ICT for literature. 

And contact your distributor to see if you as a new customer can get any.
We have had several hunderd 18cv8s on order since last July.  We are
being promised April, maybe. 

ICT is fabless, and at the mercy of their fabs.  Last year, their Singapore
fab, Chartered, cut their wafer allocation.  Instant shortage.  They
are currently working with a Rohm fab in San Jose.  Things should improve
soon, but I'll believe it when parts show up on my dock.  Never again.

--
Gerry Belanger, WA1HOZ                      wa1hoz@a3bbak.nai.net
Newtown, CT                                 g.belanger@ieee.org



Article: 2743
Subject: WTB : Xilinx development system
From: moby@kcbbs.gen.nz (Mike Diack)
Date: 1 Feb 96 03:01:37 GMT
Links: << >>  << T >>  << A >>
Capable of routing 3090 series devices
(or better)
offers ?
M

Article: 2744
Subject: Re: GAL programming for hobby use...Is there no hope?
From: Eric@wolf359.exile.org (Eric Edwards)
Date: Thu, 01 Feb 1996 04:42:51 GMT
Links: << >>  << T >>  << A >>
In article <4em0uo$klc@newsgate.sps.mot.com>, Doug Shade writes:

> Lattice has an In Circuit Programmable kit for 'round $90, that
> includes
> there spin of a 22V10.

The trouble with Lattice ISP is the same as with almost everything except
generic 22V10's.  Where do you get parts?  Digikey no longer caries them. 
AFAIK, no other low volume supplier has ever carried them.

----
"Not many fishes, in the sea.  Not many fishes, just Londo and me"
Remember the home hobbyist computer: Born 1975, died April 29, 1994



Article: 2745
Subject: Re: GAL programming for hobby use...Is there no hope?
From: jimdrew@aol.com (Jim Drew)
Date: 1 Feb 1996 04:13:34 -0500
Links: << >>  << T >>  << A >>
>And contact your distributor to see if you as a new customer can get any.
>We have had several hunderd 18cv8s on order since last July.  We are
>being promised April, maybe. 

Yeah, I guess being on allocation prevents these types of problems.  I get
thousands drop shipped monthly, so I don't see any shortage.

I am having this problem with MOSFETs though.  I wish I was on allocation
for them.  I won't see any until Jan '97.  :-\

Jim Drew, Utilities Unlimited International, Inc.


Article: 2746
Subject: Re: GAL programming for hobby use...Is there no hope?
From: mark.stephens@gsfc.nasa.gov (Mark Stephens)
Date: Thu, 01 Feb 1996 08:41:37 -0500
Links: << >>  << T >>  << A >>
I'm aware of their isp line.  At $12 a pop (apx.), it's a tad overkill
compaired to a GAL.  However, the ability to alter the circuit board
configuration in the field may come in handy someday!

mark

In article <4env0o$bjg@neptune.myri.com>, wen-king@myri.com (Wen-King Su) wrote:

>In a previous article mark.stephens@gsfc.nasa.gov (Mark Stephens) writes:
>>
><I'd really, really like to get rid of the NOR gate glue logic and replace
>>it with some species of GAL.  I have PLDasm and it's manual and can now
><create the JDEC files.  Unfortunately, my PROM programmer is just that...
>>PROMs only.  
><
>>Do I need to get another programmer or can one home brew for a specific chip?
>
>Lattice makes a 22V10 equivalent that is in-circuit reprogrammable via
>serial down load cable.  No special voltage is required, and you can make
>the down load cable yourself and hook it up to the printer port of your PC.

-- 
mark stephens                                    "In constraint,
NASA GSFC Code 521                                is freedom"
Greenbelt, MD
(301) 286-4269         mark.stephens@gsfc.nasa.gov


Article: 2747
Subject: help ! pci-interface
From: tw38966@vub.ac.be (Sha Ryu Kim Hofmans)
Date: 1 Feb 1996 15:20:31 GMT
Links: << >>  << T >>  << A >>

Hi,

I need advice from experts,

I have to build some networkcards for parallel computing using PVM.
The operating system is going to be LINUX.
The networkcards will be build in Pentium PC's.
For the PCI interface I'm using XILINX FPGA's.
The link adapters are STC101's and the link switch is a STC104.

I have some questions regarding the PCI interface.

1) Will a X4000E be fast enough ?
   Or is it recommended to use a 3000 or 7000 ?

2) In the PCI-examples that Xilinx provided, they are using two X7000's
   One for the businterface, and one for the parity check.
   Thus for maximizing the logic capicity.
   Is this necessary ? And will this be necessary if a X4000E will be used?

3) And do you guys think I'll need the optional interrupt signal INTA# for my
   design ?
   

I'd also like to know if there is some newsgroup or website where to get a
lot of info about STC101 link adapters.

Thanx in advance !!!!

Kim Hofmans
tw38966@vub.ac.be
khofmans@info.vub.ac.be



Article: 2748
Subject: Re: Xilinx or Altera?
From: ejessen@ix.netcom.com (Erik Jessen)
Date: Thu, 01 Feb 1996 16:35:12 GMT
Links: << >>  << T >>  << A >>
Stephen Bell <sbell@stephenb.demon.co.uk> wrote:

>I would be grateful for anyone's views on which they prefer; the Xilinx
>or Altera range of FPGA's. I am at present using the Xilinx XACT
>software however the sales rep made quite a case for Altera (obviously!)
>and I must admit the software sounded quite impressive. I would like to
>know has anyone made the move from xilinx to Altera and if so do they
>think it was the right move?
>I would appreciate it if I could also have email replies, I will post a
>summary back to the group, my service provider is quite slow on the news
>access at the moment so sometimes I do not get all the threads.

Are you interested in just P&R tools?  Quality/ease of synthesis is a
big issue as well, if you're doing a large design.



Article: 2749
Subject: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
From: edwint@bnr.ca (Edwin Tsang)
Date: 1 Feb 1996 18:18:16 GMT
Links: << >>  << T >>  << A >>


: I've met too many people that have made the mistake of hiring on
: "buzzwords".  They're not what makes the engineer.  They may make
: it easier to make a decision, but they mean nothing to a good manager.

Without the proper buzzwords, one may not able to pass through the HR.
For big company, the HR do not even read your resume. In order to 
reduce cost. They simply scan you resume using scanner and run a problem
to match the keywords. Also the program will assign a mark to your 
resume by number of keywords match. They will look for not only VHDL ....
etc., but also things like "team player" ,.....etc. Also if your resume
use some unusual fonts. You might be out of luck. The program might give
you a poor marks.

--
Edwin Tsang, Email:edwint@bnr.ca , NORTEL
Opinion is mine only and I reserved the right to change it 




Site Home   Archive Home   FAQ Home   How to search the Archive   How to Navigate the Archive   
Compare FPGA features and resources   

Threads starting:
1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015JanFebMarAprMayJunJulAugSepOctNovDec2015
2016JanFebMarAprMayJunJulAugSepOctNovDec2016
2017JanFebMarApr2017

Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Custom Search