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Messages from 6450

Article: 6450
Subject: Re: What is M1?
From: "William E. Lenihan III" <lenihan3we@earthlink.net>
Date: Sun, 25 May 1997 01:19:35 -0700
Links: << >>  << T >>  << A >>
Simon Bacon wrote:
> 
> For those of us who are not on the M1 pre-release program - possibly
> because we don't have paid-up software support - what is M1?
> 
> From other posts, it sounds as if XNF is being dropped.  Is that
> correct?
> 
> Will we have to abandon our home-grown tools which manipulate
> and/or generate XNF?
> 
> ---
> Regards
> Simon

I don't know if the xnf file format will be dropped from the design flow
with the M1 release, but I am certain I've heard one or more Xilinx reps
say that their plan for some time in the future involves completely
replacing the use of xnf with the edif file format. The use of more
industry standards and fewer vendor standards will promote easier
inter-tool compatibility (Xilinx & Synopsys & Mentor, etc.,).

-- 
=====================================================================
 William Lenihan                            lenihan3we@earthlink.net

    "The greatest barrier to communication is the delusion that
     it has already occurred."       -- Peter Cummings
=====================================================================
Article: 6451
Subject: NMEA and HW connection
From: Ole_Christian_Midtbust@norcontrol.com (Ole Christian Midtbust)
Date: Sun, 25 May 97 10:41:25 GMT
Links: << >>  << T >>  << A >>
I have to interface a marine electronic device (GPS) with a superior system. The  question
is if the NMEA standard 2.0 has a HW restriction when it comes to stretch, or is it
just a SW protocol?.
I'm using RS 422, RS 232 and RS 485. Rs 232 is used in connection to
an INT 803 interface with current loop.

e-mail: ole-christian.midtbust@norcontrol.no


Best regards

Ole Chr.
  
Article: 6452
Subject: Re: Cheap way to develop for FPGAs?
From: s_clubb@netcomuk.co.uk (Stuart Clubb)
Date: Sun, 25 May 1997 11:55:17 GMT
Links: << >>  << T >>  << A >>
On 23 May 1997 16:27:10 GMT, spp@bob.eecs.berkeley.edu wrote:

>Is there a version of the Lucent design system that is
>not limited to 400 registers?

If you want unlimited synthesis, the easiest way is to upgrade the
ViewSynthesis side to WVOffice Developer (via Viewlogic). Or you can
jump in with one of the many third party tools out there supporting
ORCA
	
Stuart

Article: 6453
Subject: Re: Cheap way to develop for FPGAs?
From: s_clubb@netcomuk.co.uk (Stuart Clubb)
Date: Sun, 25 May 1997 11:55:20 GMT
Links: << >>  << T >>  << A >>
On Fri, 23 May 1997 08:49:17 -0400, Richard Schwarz <aaps@erols.com>
wrote:

>The APS-X84-FB1 package supports the AT&T/XILINX 3000 series as well as
>the smaller 4000 and 5200 series parts, and CPLDs. The entire system
>including router and synthesis, simulation and FPGA test board can be
>had for $499.00.These
>kits are available now.

at http://www.erols.com/aaps/X84price.htm

It says that the FB1 package (sale price $499) supports upto 4K gates,
so that's 3x20, 3x30, 3x42, 52x2, 52x4, 4003E + CPLD's. But it doesn't
mention synthesis. It specifically says the package offers the:

"Ability to upgrade to VHDL packages and unrestricted router."

For synthesis you need the FBV kit which adds synthesis at the sale
price of $1200. That's more than Lucent. OK, no demo board with
Lucent, but we were talking "Cheap way to develop for FPGA's" here.

If you need a 4005E, or break the god barrier on your 5204, then I
guess you need the FSV kit (Foundation Standard VHDL?) at a sale price
of $2800 (Regular price $6345). That's a big price jump to have the
priveledge of using a 4005E, a 5206, or a 3064.

Stuart
Article: 6454
Subject: Re: Cheap way to develop for FPGAs?
From: s_clubb@netcomuk.co.uk (Stuart Clubb)
Date: Sun, 25 May 1997 11:55:23 GMT
Links: << >>  << T >>  << A >>
On Wed, 21 May 1997 19:28:23 GMT, z80@dserve.com (Peter) wrote:

>Does it support XC3010-XC3090, for which Lucent/AT&T were a 2nd
>source?

It does, 3020 to 3090 inclusive. However, support is schematics, and
there are some work arounds to get things to map correctly. Lucent
will be ceasing design entry support for 3000 series shortly. You will
still be able to use previous versions of foundry to P&R the designs
and maintain libraries. The existing toolset will read an A series
design, and re-spin it to a non-A architecture.

Probably not exactly what you wanted to hear, but I prefer to tell it
like it is.

I still think that having acces to a 2C10A or 2T10A for $999 is still
a good deal. There are cheaper packages (from other mfrs.) with less
features and lower densities, but I'd suggest that anyone looking at
low gate count, low cost entry tools should check out upgrade costs
for higher densities before taking the plunge.

Stuart

Article: 6455
Subject: Re: Best way to learn VHDL?
From: hiltdesign@aol.com (HiltDesign)
Date: 25 May 1997 13:36:26 GMT
Links: << >>  << T >>  << A >>

>Okay, I've been using schematic capture for all of my designs (Actel
>1240s and 1280s, Xilinx 5210 and 5215).  This summer I'll be starting on
>a new large audio signal processing design and I want to design with
>VHDL. 
>
>So what's the best way to learn VHDL?  Any recommended texts? Courses? 
>Tutorials?  Or do I just dive in?


I'd highly recommend blowing $99 on the Cypress Warp design kit,
especially for someone like you who will use VHDL for FPGA's  ... the text
book that comes with it is "VHDL for Programmable Logic" by Kevin
Skahill and you can quickly start writing code, synthesizing and doing
place/route using the examples in the book.  Also has solid info on
coding trade-offs for synthesis and FPGA limitations ... all-in-all a
very good investment, in my opinion.

Runs on a PC or UNIX.




Article: 6456
Subject: New ON-LINE VHDL/FPGA TUTORIAL
From: Richard Schwarz <aaps@erols.com>
Date: Sun, 25 May 1997 20:45:55 -0400
Links: << >>  << T >>  << A >>
A new on-line VHDL/FPGA tutorial is available on-line at

http://www.erols.com/aaps/x84lab

The main focus of this initial Lab Book is to provide a quick, concise
guide to synthesis and in circuit deployment of designs. The Tutorial
uses the X84 Lab kit and X84 FPGA board, but the tutorial could be used
without them.

Some of the advanced Labs are not available on-line as of yet, and will
include a Programmable PN (LFSR) pattern generator, correlator, and BERT
tester.

We also hope to follow up with a VHDL SIMULATOR Lab book, at a later
time.

We think that these on-line Labs will be of great service to those new
to FPGAs and VHDL designs.

--
______________________________________________
Richard D. Schwarz, President
Associated Professional Systems (APS)
FPGA Solutions/Test Boards/ EDA Software
SIGTEK Spread Spectrum & Comm. Equipment
3003 Latrobe Court, Abingdon, Maryland 21009
Phone: 410-569-5897   Fax: 410-661-2760
Email: aaps@erols.com
Web site: http://www.erols.com/aaps
_______________________________________________

Article: 6457
Subject: VHDL
From: "Chris Bray" <chris@diatomic.com>
Date: Sun, 25 May 1997 22:06:46 -0400
Links: << >>  << T >>  << A >>

What is VHDL?
Is there a comp.arch.fpga FAQ?

Thanks,
Chris Bray


Article: 6458
Subject: Altera decimated filter design
From: Alec Cosic <aleks@spri.levels.unisa.edu.au>
Date: Mon, 26 May 1997 13:48:01 +0930
Links: << >>  << T >>  << A >>
Hi,

I am looking for information on how to design decimated filter on FPGA 
using Altera and their DSP software.

Has anybody had experience with decimated filter design with Altera
metafunction?


Thanks in advance

Regards


A. Cosic
Article: 6459
Subject: Re: Fine Pitch PQFP : anyone any hassles?
From: wen-king@myri.com (Wen-King Su)
Date: 25 May 1997 22:20:19 -0700
Links: << >>  << T >>  << A >>
In a previous article stuart.summerville@practel.com.au (Stuart Summerville) writes:
:
;Hi all,
:
;I have a 208pin PQFP fpga  (0.5mm pitch) on a board. I am having
:problems with pin connections to the board. Attempting to re-heat the
;solder to make a clean connection seems to create problems with
:surrounding pins - it doesn't take much to get a minute solder bridge
;between two pins.
:
;Two questions:
:
;1) Do any of you find such packages tend to come in with such
:connection problems?

The pins are fragile, and they have to be kept perferctly on the same
plane and the board has to be perfectly flat over the area of the QFP.
Thus the bigger the QFP gets, the more difficult it is to solder properly.
We frequently have problems with 240-pin versions of the same QFP.

:2) What is the feeling about attempting to re-solder such pins if a
;connection seems to be flakey? Am I wasting my time trying to fix it?
:Maybe if some pins have flakey connections then others on the same
;chip are likely to (eg. if some are bent down too much, then obviously
:the others are at a different level...).

You can get skilled technicians or acquire the skill to solder them.
It is not hard, but it takes some practice.  We have a few in house who
routinely solder a QFP without having to use solder wick for cleanup. 
We use Exacto knife to push on each individual pin to find a loose one,
and we apply more solder to them all the time.
Article: 6460
Subject: Re: Best way to learn VHDL?
From: Tim Warland <twarland@nortel.ca>
Date: Mon, 26 May 1997 08:34:57 -0400
Links: << >>  << T >>  << A >>
Robert Trent asks:
<snip>  
> So what's the best way to learn VHDL?  Any recommended texts? Courses?
> Tutorials?  Or do I just dive in?  I'll be talking to some of the FAEs
> soon but I want some less biased opinions from this newsgroup...
> 
The best (and most reasonable) course I've attended is the one offered
by Cypress for their WARP tools.  It provides a good foundation for
you to build upon.  What I particularly liked was that the course made
you THINK about what you could do with VHDL rather than treating you
like a trainable ape (first press this button, now enter this command,
now write the following....).

Cheers
Tim.
-- 
You better be doing something so that in the future
you can look back on "the good old days"

My opinions != Nortel's opinion;  Nortel's Hardware :-)
Article: 6461
Subject: Re: Best way to learn VHDL?
From: "Per Bjuréus" <pebj@celsiustech.se>
Date: 26 May 1997 15:52:35 GMT
Links: << >>  << T >>  << A >>
Robert Trent <trent@helix.net> wrote <33876A08.3E71@helix.net>...
> So what's the best way to learn VHDL?  Any recommended texts? Courses? 
> Tutorials?  Or do I just dive in?  I'll be talking to some of the FAEs
> soon but I want some less biased opinions from this newsgroup...

If you are looking for a course or CD-ROM tutorial, check out Esperan at
http://www.esperan.com/
I attended a Verilog course of theirs last year and was very satisfied,
and I plan to use their MasterClass tutorial now that I convert to VHDL.

/Per

-- 
pebj@celsiustech.se
is...
Per Bjuréus
CelsiusTech Electronics
S-181 84 LIDINGO
SWEDEN

Article: 6462
Subject: Re: Fine Pitch PQFP : anyone any hassles?
From: Tom Burgess <tburgess@drao.nrc.ca>
Date: Mon, 26 May 1997 10:05:19 -0700
Links: << >>  << T >>  << A >>
Stuart Summerville wrote:
> 
> Hi all,
> 
> I have a 208pin PQFP fpga  (0.5mm pitch) on a board. I am having
> problems with pin connections to the board. Attempting to re-heat the
> solder to make a clean connection seems to create problems with
> surrounding pins - it doesn't take much to get a minute solder bridge
> between two pins.
> 

1. Such problems occur. Because fine-pitch assembly demands perfection,
it sometimes takes a couple of iterations for the manufacturer to get
it right. Hard to get perfection the first time on a prototype run.

2. Most important rule for fine-pitch SM rework - Use liquid flux
liberally! Brush all over the general neighborhood of the pin you are
touching up. The flux helps a LOT to reduce bridging. We are using
Alphmetals 615-25 RMA flux. Can buy it in little nail-polish bottles
or by the gallon.

	regards, tom. (tburgess@drao.nrc.ca)
Article: 6463
Subject: Re: Fine Pitch PQFP : anyone any hassles?
From: z80@dserve.com (Peter)
Date: Mon, 26 May 1997 19:44:23 GMT
Links: << >>  << T >>  << A >>

0.5mm pitch hand soldering is OK, with some practice. 

You need a high quality soldering iron bit. Personally I use the Pace
kit, and you can get the soldering iron only stuff for about $400
IIRC. There is a technique (hard to describe without diagrams, get the
Pace rep to show you) which works 99% of the time, and solder wick is
needed only rarely, perhaps only on the last 2 pins in each row thus
soldered.

First attach the four corner pins, by tacking them down with the iron.
Then make sure the chip is placed right, then do the rest.

But you also need to get the PCB right. Make sure that

 - the pads are generous, length-wise (width-wise you are obviously
   somewhat limited :)
 - the solder resist is precisely aligned (MUST be photo-
   mechanical, NOT screen-printed)
 - avoid dry film solder resist (too thick)
 - PCB solderability must be 100% - best is gold-plated (costs
   suprisingly little, perhaps $0.50 per small board)
 - PCB must be totally FLAT before soldering - this means avoid
   the standard hot-air-levelled technology which leaves solder
   "hills" on the component pads, lifting the IC off the PCB.
   Comes back to gold plating, which is totally flat.

The above is essential for good yield in auto pick/place assembly,
especially as most subcontract houses employ monkeys. But it also
helps a lot with hand mounting.

With screen printing, the screen needs to be brass (not polyester) and
needs to be typically 0.006" (not the more usual 0.008") thick. This
can cause problems if there are also large items on the board that
need lots of solder, e.g. big diodes.


Peter.

Return address is invalid to help stop junk mail.
E-mail replies to z80@digiserve.com.
Article: 6464
Subject: Fine Pitch PQFP : anyone any hassles?
From: stuart.summerville@practel.com.au (Stuart Summerville)
Date: Mon, 26 May 1997 20:47:42 GMT
Links: << >>  << T >>  << A >>
Hi all,

I have a 208pin PQFP fpga  (0.5mm pitch) on a board. I am having
problems with pin connections to the board. Attempting to re-heat the
solder to make a clean connection seems to create problems with
surrounding pins - it doesn't take much to get a minute solder bridge
between two pins.

Two questions:

1) Do any of you find such packages tend to come in with such
connection problems?

2) What is the feeling about attempting to re-solder such pins if a
connection seems to be flakey? Am I wasting my time trying to fix it?
Maybe if some pins have flakey connections then others on the same
chip are likely to (eg. if some are bent down too much, then obviously
the others are at a different level...).

Regards, Stu.
---------------------------------------------
Stuart Summerville      
Project Engineer         
Practel International
442 Torrens Road, Kilkenny, SA 5009
Tel: (61.8) 8268 2196  Fax: (61.8) 8268 2882
Email: stuart.summerville@practel.com.au  
---------------------------------------------
Article: 6465
Subject: Re: Fine Pitch PQFP : anyone any hassles?
From: Gavin Melville <gavin@cypher.co.nz>
Date: Tue, 27 May 1997 09:25:23 +1200
Links: << >>  << T >>  << A >>
Stuart Summerville wrote:

> Hi all,
>
> I have a 208pin PQFP fpga  (0.5mm pitch) on a board.

I have had good success at hand soldering 0.5mm 240 PQFP.   As others
have suggested the rules are :

Good liquid flux,
Good iron tip -- very clean and the right heat,
Pre heat (with hair dryer) before fluxing,
Tack the corner pins,
work on a slope and run a bead downhill -- sometimes two passes needed.
Get flux everywhere -- on the IC and the board,
Use solderwick on the last couple of pins if needed, but be care not to
pull them away from the board.
Initial positioning is important,
Inspect well.

Article: 6466
Subject: Re: Cheap way to develop for FPGAs?
From: Richard Schwarz <aaps@erols.com>
Date: Mon, 26 May 1997 19:16:23 -0400
Links: << >>  << T >>  << A >>
Stuart Clubb wrote:

> On Fri, 23 May 1997 08:49:17 -0400, Richard Schwarz <aaps@erols.com>
> wrote:
>
> >The APS-X84-FB1 package supports the AT&T/XILINX 3000 series as well
> as
> >the smaller 4000 and 5200 series parts, and CPLDs. The entire system
> >including router and synthesis, simulation and FPGA test board can be
>
> >had for $499.00.These
> >kits are available now.
>
> at http://www.erols.com/aaps/X84price.htm
>
> It says that the FB1 package (sale price $499) supports upto 4K gates,
>
> so that's 3x20, 3x30, 3x42, 52x2, 52x4, 4003E + CPLD's. But it doesn't
>
> mention synthesis. It specifically says the package offers the:
>
> "Ability to upgrade to VHDL packages and unrestricted router."
>
> For synthesis you need the FBV kit which adds synthesis at the sale
> price of $1200. That's more than Lucent. OK, no demo board with
> Lucent, but we were talking "Cheap way to develop for FPGA's" here.
>
> If you need a 4005E, or break the god barrier on your 5204, then I
> guess you need the FSV kit (Foundation Standard VHDL?) at a sale price
>
> of $2800 (Regular price $6345). That's a big price jump to have the
> priveledge of using a 4005E, a 5206, or a 3064.
>
> Stuart

 I already sent a reply to this, but haven't seen it on the NG.

All APS-X84 kits come with synthesis. The $499.00 package comes with
schematic synthesis. As well as:

ROUTER
CPLD support
SIMULATOR
FPGA board with FPGA installed
One years maint & upgrades

It is hard to beleive so I do understand the confusion, but there it is.
The other kits are equally valued. Especially the FSV kit which gets you
in the  4000 and 5000 series chips with gate count restraints. Full VHDL
capabiliites, including an ON-LINE VHDL multimedia tutorial from
Espreran, and of course the schematic capture synthesis as well.(its
nice to have both, especially if you are transitioning from schematic to
HDL). It is fully supported from XILINX (still the industry leader) and
the 4000E and 5000 series chips are the most used and accepted  FPGAs in
the industry.

--
______________________________________________
Richard D. Schwarz, President
Associated Professional Systems (APS)
FPGA Solutions/Test Boards/ EDA Software
SIGTEK Spread Spectrum & Comm. Equipment
3003 Latrobe Court, Abingdon, Maryland 21009
Phone: 410-569-5897   Fax: 410-661-2760
Email: aaps@erols.com
Web site: http://www.erols.com/aaps
_______________________________________________

Article: 6467
Subject: Re: Fine Pitch PQFP : anyone any hassles?
From: pss1@hopper.unh.edu (Paul S Secinaro)
Date: 27 May 1997 00:00:56 GMT
Links: << >>  << T >>  << A >>

For soldering fine-pitch parts, I've found that a good microscope is
invaluable.  These can be had for about $2K or so.  A good soldering
iron with a fine tip is also crucial, of course.  I've had lousy luck
with liquid flux myself.  It always seems to undercut the pads and
lift them for some reason (maybe I'm using too much).

-Paul
-- 
Paul Secinaro (pss1@christa.unh.edu)
Synthetic Vision and Pattern Analysis Laboratory
UNH Dept. of Electrical and Computer Engineering
Article: 6468
Subject: Re: Fine Pitch PQFP : anyone any hassles?
From: wen-king@myri.com (Wen-King Su)
Date: 26 May 1997 18:25:43 -0700
Links: << >>  << T >>  << A >>
In a previous article pss1@hopper.unh.edu (Paul S Secinaro) writes:
:
;
:For soldering fine-pitch parts, I've found that a good microscope is
;invaluable.  These can be had for about $2K or so.  A good soldering
:iron with a fine tip is also crucial, of course.  I've had lousy luck
;with liquid flux myself.  It always seems to undercut the pads and
:lift them for some reason (maybe I'm using too much).

I actually find the widest tip works best.  The best tip I have use so
far is one called "mini-wave" tip from PACE.  It has a concave cup set
into the cut surface of a conic section.  The cup is filled with solder
and then helded in an inverted position.  The round outter edge of the
cut face is then dragged steadily over the "toes" of the pins. Because
of the angle of cut surface, you can make contact with just the toes and
not the legs where no solder is needed and where bridging is likely to
occur. 
Article: 6469
Subject: Re: Looking for FAQ
From: "Steven K. Knapp" <optmagic@ix.netcom.com>
Date: 27 May 1997 03:02:33 GMT
Links: << >>  << T >>  << A >>
I don't know of a specific FAQ, but you may want to look at the information
on the Programmable Logic Jump Station at 'http://www.optimagic.com'.  It
has information on:

FPGA/CPLD Companies:  http://www.optimagic.com/companies.html
Design Software:  http://www.optimagic.com/software.html
Consultants:  http://www.optimagic.com/consultants.html
Books:  http://www.optimagic.com/books.html
Boards:  http://www.optimagic.com/boards.html
Newsgroups:  http://www.optimagic.com/newsgroups.html
FPGA/CPLD Research:  http://www.optimagic.com/research.html
Information Search:  http://www.optimagic.com/search.html
-- 
Steven Knapp
OptiMagic(tm) Logic Design Solutions
E-mail:  optmagic@ix.netcom.com
Programmable Logic Jump Station:  http://www.netcom.com/~optmagic

simon.lam(65)-754-2315 <slam@lodestone.cnet.att.com> wrote in article
<5m8flq$7da@nntpb.cb.lucent.com>...
| Folks,
| 
| Does anyone know if there is a FAQ site for this nesgroup? 
| 
| Thanks in advance!
| 
| 
Article: 6470
Subject: Re: Best way to learn VHDL?
From: "Steven K. Knapp" <optmagic@ix.netcom.com>
Date: 27 May 1997 03:07:56 GMT
Links: << >>  << T >>  << A >>
William E. Lenihan III <lenihan3we@earthlink.net> wrote in article
<3387EE14.B8E@earthlink.net>...
| Robert Trent wrote:
| > 
| > Okay, I've been using schematic capture for all of my designs (Actel
| > 1240s and 1280s, Xilinx 5210 and 5215).  This summer I'll be starting
on
| > a new large audio signal processing design and I want to design with
| > VHDL.  I'm not sure, at this point, what chip I'll be using but I've
| > been eyeing some of the larger Altera 10K series FPGAs.  I think I'll
be
| > needing about 50,000 gates.
| > 
| > So what's the best way to learn VHDL?  Any recommended texts? Courses?
| > Tutorials?  Or do I just dive in?  I'll be talking to some of the FAEs
| > soon but I want some less biased opinions from this newsgroup...
| > 
| > Robert.
| 
I've found Douglas J. Smith's book useful (HDL Chip Design: A Practical
Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using
VHDL or Verilog).  See 'http://www.doone.com/hdl_chip_des.html'.

It has side-by-side examples in VHDL and Verilog.  Most examples also
include a schematic, some 'C' code, or another reference to help you
understand the language.

I have a list of other FPGA/CPLD/VHDL/Verilog books listed at
'http://www.optimagic.com/books.html'.  There is also a list of
VHDL/Verilog tutorials that I've come across at
'http://www.optimagic.com/tutorials.html'.
-- 
Steven Knapp
OptiMagic(tm) Logic Design Solutions
E-mail:  optmagic@ix.netcom.com
Programmable Logic Jump Station:  http://www.netcom.com/~optmagic
Article: 6471
Subject: Re: FPGA gate counting: No truth in advertising
From: john@customer1st.com (John Sievert)
Date: Mon, 26 May 1997 22:43:29 -0500
Links: << >>  << T >>  << A >>
Technology, which it appears, probably came from Actel (per summary
judgement against QuickLogic on patent infringement.).

<kevintsmith@compuserve.com> wrote:

> In this case, it's not marketing hype, just superior
> technology.


-- 
Regards,
John Sievert
Article: 6472
Subject: I2C Interface
From: hgw@cssmuc.frt.dec.com (Hans-Guenther Willers)
Date: 27 May 1997 06:06:03 GMT
Links: << >>  << T >>  << A >>
Hi All!

has someone done an I2C slave interface in a HDL (AHDL, VHDL,
Verilog)?



Greetings,

Hans-Guenther Willers (is hgw@frt.dec.com)

Article: 6473
Subject: Xmit data thru X-Checker of Xilinx 4000 series to program a Flash with it
From: djimm2@aol.com (Djimm2)
Date: 27 May 1997 07:28:55 GMT
Links: << >>  << T >>  << A >>

Hi there                               27.5.97

A friend of mine told me, that the "guru's" of FPGA's reside in this
usergroup . (Let's see......)

To all the Xilinx experts I have three questions. First please read the
description of the matter:

      I need to program a Flash-Eprom (AM 29LV008, 8MBit parallel ) which
is attached to a Xilinx 4010 at its dedicated A0..A18 and D0..D7 directly
and exlusively. I cannot physically connect the Flash directly to a
programmer. I have no CPU or uController in this design.

         I was thinking of using the X-Checker to download a sord of
"bootstrap"-program which does the following: After it is downloaded, it
will pass over any "further data" coming in from the X-Checker to the
Flash-Eprom with the needed signals to program it.

      This "further data" itself is composed of a lookuptable and the
"real" program for the XC4010. 

      After the Flash is programmed, I would flip the corresponding
Dipswitches (M0,1 or 2) to make the XC4010 boot from this Flash (which
holds now the programm + the lookuptable) next time.

      I looked at the "protocol" of the Xilinx data (like the CRC's etc),
and could embedd my lookuptable+program in such a protocoll with a program
and send it through the RS232 to the X-Checker.

Question #1:
      How can I access the "black box", which does the decoding of the
serial data from the X-Checker? It must be implemented in hardware
somehow.
      If it is not accessible, does anybody have written the decoding of
the serial stream back into bytes? As VHDL or Schematic?

Question #2:
      Can I send data FROM the XC4010 through the X-Checker TO the PC?
This must be possible somehow, because there is a handshake .

Question #3:
      Has anybody written a program (in C or Turbo Pascal) that does the
mentioned "Xilinx embedding" to data, so it can be sent to the X-Checker?

Please be so kind and send your suggestions (or further questions) to
Djimm2@aol.com.
Sorry for my bad english, 

Thank you , 

your Jimmy D.
Article: 6474
Subject: Re: Best way to learn VHDL?
From: ees1ht@ee.surrey.ac.uk (Hans Tiggeler)
Date: 27 May 1997 08:36:32 GMT
Links: << >>  << T >>  << A >>
Robert,

I would stay with Actel, their latest ACTmap 3.1 VHDL synthesiser (comes with 
Designer Series) is quite powerful. Some (or all?) of Actel's IP cores are 
synthesised using ACTmap. Don't use a previous version of ACTmap. The difference 
between ACTmap 3.1 and 3.0 is as great as the difference between DOS and NT :-) If 
you don't have access to the latest Actel Designer series than I would suggest 
Warp2 version 4.1 You can get it for as little as 69 pounds + VHDL book here in 
the UK. I would also recommend you get a Flash CPLD (e.g. 375i) and the parallel 
download cable. This will allow you to try some of your designs on real hardware, 
and if it doesn't work you try again.

The disadvantage of Warp and ACTmap is that you don't have a VHDL simulator. The 
Warp Nova timing simulator is very crude and in my belief not particular useful. 
If you want to write testbenches, play with files etc. I would suggest you get a 
copy of Accolade's PeakVHDL. It remind me of the good old Turbo Pascal days, just 
1 button for compile,link and simulate. They have several version, I belief the 
cheapest is about 500 dollars. It's not perfect but good for learning VHDL. 

For VHDL info I would say look at what's available on the internet, if you enter 
VHDL in Alta Vista you get about 20000 hits. One thing I would recommend is that 
you start learning good coding styles and methodologies from the beginning. Have a 
look at Ben Cohen's book or the ESA VHDL guide.

Good luck,

Hans.
 
  
In article <33876A08.3E71@helix.net>, trent@helix.net says...
>
>Okay, I've been using schematic capture for all of my designs (Actel
>1240s and 1280s, Xilinx 5210 and 5215).  This summer I'll be starting on
>a new large audio signal processing design and I want to design with
>VHDL.  I'm not sure, at this point, what chip I'll be using but I've
>been eyeing some of the larger Altera 10K series FPGAs.  I think I'll be
>needing about 50,000 gates.
>
>So what's the best way to learn VHDL?  Any recommended texts? Courses? 
>Tutorials?  Or do I just dive in?  I'll be talking to some of the FAEs
>soon but I want some less biased opinions from this newsgroup...
>
>Robert.



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